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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babic1f76ac12011-11-30 23:56:52 +00002/*
3 * Copyright (C) 2011
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 *
6 * Copyright (C) 2009 TechNexion Ltd.
Stefano Babic1f76ac12011-11-30 23:56:52 +00007 */
8
9#ifndef __TAM3517_H
10#define __TAM3517_H
11
12/*
13 * High Level Configuration Options
14 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000015
Stefano Babic1f76ac12011-11-30 23:56:52 +000016#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050017#include <asm/arch/omap.h>
Stefano Babic1f76ac12011-11-30 23:56:52 +000018
Stefano Babic1f76ac12011-11-30 23:56:52 +000019/* Clock Defines */
20#define V_OSCK 26000000 /* Clock output from T2 */
21#define V_SCLK (V_OSCK >> 1)
22
Stefano Babic1f76ac12011-11-30 23:56:52 +000023/*
Stefano Babic1f76ac12011-11-30 23:56:52 +000024 * DDR related
25 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000026#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
27
28/*
29 * Hardware drivers
30 */
31
32/*
33 * NS16550 Configuration
34 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000035#define CONFIG_SYS_NS16550_SERIAL
36#define CONFIG_SYS_NS16550_REG_SIZE (-4)
37#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
38
39/*
40 * select serial console configuration
41 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000042#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
Stefano Babic1f76ac12011-11-30 23:56:52 +000043
Stefano Babic1f76ac12011-11-30 23:56:52 +000044#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
45 115200}
Stefano Babic1f76ac12011-11-30 23:56:52 +000046
Stefano Babicf39fd592012-08-29 01:21:59 +000047#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
Stefano Babic1f76ac12011-11-30 23:56:52 +000048
49/*
50 * Board NAND Info.
51 */
52#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
53 /* to access */
54 /* nand at CS0 */
55
56#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
57 /* NAND devices */
Stefano Babic1f76ac12011-11-30 23:56:52 +000058
Stefano Babic1f76ac12011-11-30 23:56:52 +000059/*
60 * Miscellaneous configurable options
61 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000062#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
63
Stefano Babic1f76ac12011-11-30 23:56:52 +000064#define CONFIG_SYS_MAXARGS 32 /* max number of command */
65 /* args */
Stefano Babic1f76ac12011-11-30 23:56:52 +000066
67/*
68 * AM3517 has 12 GP timers, they can be driven by the system clock
69 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
70 * This rate is divided by a local divisor.
71 */
72#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
73#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000074
75/*
Stefano Babic1f76ac12011-11-30 23:56:52 +000076 * Physical Memory Map
77 */
Stefano Babic1f76ac12011-11-30 23:56:52 +000078#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Stefano Babic1f76ac12011-11-30 23:56:52 +000079#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
80
81/*
82 * FLASH and environment organization
83 */
84
85/* **** PISMO SUPPORT *** */
Stefano Babic1f76ac12011-11-30 23:56:52 +000086
87/* Redundant Environment */
88#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
Stefano Babic1f76ac12011-11-30 23:56:52 +000089
90#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
91#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
92#define CONFIG_SYS_INIT_RAM_SIZE 0x800
93#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
94 CONFIG_SYS_INIT_RAM_SIZE - \
95 GENERATED_GBL_DATA_SIZE)
96
97/*
98 * ethernet support, EMAC
99 *
100 */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000101#define CONFIG_NET_RETRY_COUNT 10
Stefano Babic1f76ac12011-11-30 23:56:52 +0000102
103/* Defines for SPL */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000104#define CONFIG_SPL_CONSOLE
Jeroen Hofstee64407af2013-12-21 18:03:09 +0100105#define CONFIG_SPL_NAND_SOFTECC
Stefano Babic1f76ac12011-11-30 23:56:52 +0000106#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
107
Tom Rinicfff4aa2016-08-26 13:30:43 -0400108#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
109 CONFIG_SPL_TEXT_BASE)
Stefano Babice0faf3c2016-06-14 09:13:37 +0200110#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
Stefano Babic1f76ac12011-11-30 23:56:52 +0000111
112#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
113#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
114#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
115#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
116
Stefano Babice0faf3c2016-06-14 09:13:37 +0200117#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
118
119/* FAT */
120#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
121#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
122
123/* RAW SD card / eMMC */
124#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
125#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
126#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
127
Stefano Babic1f76ac12011-11-30 23:56:52 +0000128/* NAND boot config */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000129#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
130 48, 49, 50, 51, 52, 53, 54, 55,\
131 56, 57, 58, 59, 60, 61, 62, 63}
132#define CONFIG_SYS_NAND_ECCSIZE 256
133#define CONFIG_SYS_NAND_ECCBYTES 3
134
Stefano Babic1f76ac12011-11-30 23:56:52 +0000135#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
136
Stefano Babic1f76ac12011-11-30 23:56:52 +0000137#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
138
Stefano Babic1f76ac12011-11-30 23:56:52 +0000139/* Setup MTD for NAND on the SOM */
Stefano Babic1f76ac12011-11-30 23:56:52 +0000140
Stefano Babic1f76ac12011-11-30 23:56:52 +0000141#define CONFIG_TAM3517_SETTINGS \
142 "netdev=eth0\0" \
143 "nandargs=setenv bootargs root=${nandroot} " \
144 "rootfstype=${nandrootfstype}\0" \
145 "nfsargs=setenv bootargs root=/dev/nfs rw " \
146 "nfsroot=${serverip}:${rootpath}\0" \
147 "ramargs=setenv bootargs root=/dev/ram rw\0" \
148 "addip_sta=setenv bootargs ${bootargs} " \
149 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
150 ":${hostname}:${netdev}:off panic=1\0" \
151 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
152 "addip=if test -n ${ipdyn};then run addip_dyn;" \
153 "else run addip_sta;fi\0" \
154 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
155 "addtty=setenv bootargs ${bootargs}" \
156 " console=ttyO0,${baudrate}\0" \
157 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
158 "loadaddr=82000000\0" \
159 "kernel_addr_r=82000000\0" \
Mario Six790d8442018-03-28 14:38:20 +0200160 "hostname=" CONFIG_HOSTNAME "\0" \
161 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000162 "flash_self=run ramargs addip addtty addmtd addmisc;" \
163 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
164 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
165 "bootm ${kernel_addr}\0" \
166 "nandboot=run nandargs addip addtty addmtd addmisc;" \
167 "nand read ${kernel_addr_r} kernel\0" \
168 "bootm ${kernel_addr_r}\0" \
169 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
170 "run nfsargs addip addtty addmtd addmisc;" \
171 "bootm ${kernel_addr_r}\0" \
172 "net_self=if run net_self_load;then " \
173 "run ramargs addip addtty addmtd addmisc;" \
174 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
175 "else echo Images not loades;fi\0" \
Mario Six790d8442018-03-28 14:38:20 +0200176 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000177 "load=tftp ${loadaddr} ${u-boot}\0" \
178 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Mario Six790d8442018-03-28 14:38:20 +0200179 "mlo=" CONFIG_HOSTNAME "/MLO\0" \
Stefano Babic1f76ac12011-11-30 23:56:52 +0000180 "uboot_addr=0x80000\0" \
181 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
182 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
183 "updatemlo=nandecc hw;nand erase 0 20000;" \
184 "nand write ${loadaddr} 0 20000\0" \
185 "upd=if run load;then echo Updating u-boot;if run update;" \
186 "then echo U-Boot updated;" \
187 "else echo Error updating u-boot !;" \
188 "echo Board without bootloader !!;" \
189 "fi;" \
190 "else echo U-Boot not downloaded..exiting;fi\0" \
191
Stefano Babicf39fd592012-08-29 01:21:59 +0000192/*
193 * this is common code for all TAM3517 boards.
194 * MAC address is stored from manufacturer in
195 * I2C EEPROM
196 */
197#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
Stefano Babicf39fd592012-08-29 01:21:59 +0000198/*
199 * The I2C EEPROM on the TAM3517 contains
200 * mac address and production data
201 */
202struct tam3517_module_info {
203 char customer[48];
204 char product[48];
205
206 /*
207 * bit 0~47 : sequence number
208 * bit 48~55 : week of year, from 0.
209 * bit 56~63 : year
210 */
211 unsigned long long sequence_number;
212
213 /*
214 * bit 0~7 : revision fixed
215 * bit 8~15 : revision major
216 * bit 16~31 : TNxxx
217 */
218 unsigned int revision;
219 unsigned char eth_addr[4][8];
220 unsigned char _rev[100];
221};
222
Stefano Babic0a152e62012-11-23 05:19:25 +0000223#define TAM3517_READ_EEPROM(info, ret) \
224do { \
Tom Rinia7a9bc02021-08-18 23:12:29 -0400225 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000226 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
Stefano Babic0a152e62012-11-23 05:19:25 +0000227 (void *)info, sizeof(*info))) \
228 ret = 1; \
229 else \
230 ret = 0; \
231} while (0)
232
233#define TAM3517_READ_MAC_FROM_EEPROM(info) \
234do { \
235 char buf[80], ethname[20]; \
236 int i; \
Stefano Babicf39fd592012-08-29 01:21:59 +0000237 memset(buf, 0, sizeof(buf)); \
Stefano Babic0a152e62012-11-23 05:19:25 +0000238 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
Stefano Babicf39fd592012-08-29 01:21:59 +0000239 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
Stefano Babic0a152e62012-11-23 05:19:25 +0000240 (info)->eth_addr[i][5], \
241 (info)->eth_addr[i][4], \
242 (info)->eth_addr[i][3], \
243 (info)->eth_addr[i][2], \
244 (info)->eth_addr[i][1], \
245 (info)->eth_addr[i][0]); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000246 \
247 if (i) \
248 sprintf(ethname, "eth%daddr", i); \
249 else \
Ben Whitten34fd6c92015-12-30 13:05:58 +0000250 strcpy(ethname, "ethaddr"); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000251 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
Simon Glass6a38e412017-08-03 12:22:09 -0600252 env_set(ethname, buf); \
Stefano Babicf39fd592012-08-29 01:21:59 +0000253 } \
254} while (0)
Stefano Babic0a152e62012-11-23 05:19:25 +0000255
256/* The following macros are taken from Technexion's documentation */
257#define TAM3517_sequence_number(info) \
258 ((info)->sequence_number % 0x1000000000000LL)
259#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
260#define TAM3517_year(info) ((info)->sequence_number >> 56)
261#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
262#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
263#define TAM3517_revision_tn(info) ((info)->revision >> 16)
264
265#define TAM3517_PRINT_SOM_INFO(info) \
266do { \
267 printf("Vendor:%s\n", (info)->customer); \
268 printf("SOM: %s\n", (info)->product); \
269 printf("SeqNr: %02llu%02llu%012llu\n", \
270 TAM3517_year(info), \
271 TAM3517_week_of_year(info), \
272 TAM3517_sequence_number(info)); \
273 printf("Rev: TN%u %u.%u\n", \
274 TAM3517_revision_tn(info), \
275 TAM3517_revision_major(info), \
276 TAM3517_revision_fixed(info)); \
277} while (0)
278
Stefano Babicf39fd592012-08-29 01:21:59 +0000279#endif
280
Stefano Babic1f76ac12011-11-30 23:56:52 +0000281#endif /* __TAM3517_H */