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git01.mediatek.com / filogic / uboot / d4932bdfddaef580c2334c44926244cd5720b70b / . / configs / ls1046aqds_qspi_defconfig
blob: dad335af1d6fbcf34e9a57ae07f35241ba235205 [file] [log] [blame]
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1046AQDS=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x102000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=2
Tom Rini56fd1e12020-11-30 12:50:32 -0500[diff] [blame]6CONFIG_SYS_MEMTEST_START=0x80000000
7CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x2000
9CONFIG_ENV_OFFSET=0x300000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_SYS_I2C_MXC_I2C2=y
13CONFIG_SYS_I2C_MXC_I2C3=y
14CONFIG_SYS_I2C_MXC_I2C4=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]15CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]17CONFIG_FSL_USE_PCA9547_MUX=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]18CONFIG_FSL_LS_PPA=y
Peng Ma6dff14c2019-01-30 19:14:47 +0800[diff] [blame]19CONFIG_AHCI=y
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]20CONFIG_DISTRO_DEFAULTS=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]21CONFIG_FIT_VERBOSE=y
22CONFIG_OF_BOARD_SETUP=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]23CONFIG_QSPI_BOOT=y
24CONFIG_BOOTDELAY=10
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]25CONFIG_USE_BOOTARGS=y
Kuldeep Singh6d0e75d2019-04-08 06:03:29 +0000[diff] [blame]26CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)"
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]27# CONFIG_USE_BOOTCOMMAND is not set
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]28CONFIG_MISC_INIT_R=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]29CONFIG_CMD_BOOTZ=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]30CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]31CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]32CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]33CONFIG_CMD_MEMTEST=y
Biwen Li2ffefc32021-02-05 19:02:13 +0800[diff] [blame]34CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]35CONFIG_CMD_GPT=y
Simon Glassc88a09a2017-08-04 16:34:34 -0600[diff] [blame]36CONFIG_CMD_I2C=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]37CONFIG_CMD_MMC=y
Simon Glassc88a09a2017-08-04 16:34:34 -0600[diff] [blame]38CONFIG_CMD_PCI=y
Tom Rinie791a022017-08-11 11:20:19 -0400[diff] [blame]39CONFIG_CMD_USB=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]40CONFIG_CMD_CACHE=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]41CONFIG_MP=y
Kuldeep Singh6d0e75d2019-04-08 06:03:29 +0000[diff] [blame]42CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]43CONFIG_OF_CONTROL=y
Kuldeep Singh248a2932020-07-30 15:38:07 +0530[diff] [blame]44CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]45CONFIG_ENV_IS_IN_SPI_FLASH=y
Kuldeep Singh5c25c0e2020-05-12 14:39:46 +0530[diff] [blame]46CONFIG_ENV_ADDR=0x40300000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]47CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Shaohui Xie085ac1c2016-09-07 17:56:14 +0800[diff] [blame]48CONFIG_DM=y
Peng Ma6dff14c2019-01-30 19:14:47 +0800[diff] [blame]49CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]50CONFIG_FSL_CAAM=y
Tom Rinif7246c22021-08-21 13:50:17 -0400[diff] [blame]51CONFIG_DYNAMIC_DDR_CLK_FREQ=y
Tom Rini468c2d52021-08-21 13:50:18 -0400[diff] [blame]52CONFIG_DDR_ECC=y
53CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]54CONFIG_DM_I2C=y
Tom Rini714482a2021-08-18 23:12:25 -0400[diff] [blame]55CONFIG_SYS_I2C_EARLY_INIT=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]56CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]57CONFIG_SYS_I2C_EEPROM_ADDR=0x57
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]58CONFIG_FSL_ESDHC=y
Rajat Srivastavac4767732019-04-24 18:15:11 +0530[diff] [blame]59# CONFIG_SPI_FLASH_BAR is not set
Kuldeep Singh63012802021-11-09 14:52:26 +0530[diff] [blame]60CONFIG_SPI_FLASH_EON=y
Kuldeep Singh1c481a82020-05-12 14:32:39 +0530[diff] [blame]61CONFIG_SPI_FLASH_SPANSION=y
Kuldeep Singh63012802021-11-09 14:52:26 +0530[diff] [blame]62CONFIG_SPI_FLASH_STMICRO=y
63CONFIG_SPI_FLASH_SST=y
Ashish Kumar3c2065d2018-06-26 14:48:30 +0530[diff] [blame]64# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Alexandru Gagniucd83e98c2017-08-01 17:19:59 -0700[diff] [blame]65CONFIG_PHYLIB=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]66CONFIG_PHYLIB_10G=y
67CONFIG_PHY_REALTEK=y
68CONFIG_PHY_VITESSE=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]69CONFIG_E1000=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]70CONFIG_FMAN_ENET=y
Rajesh Bhagataec38012021-11-09 16:30:38 +0530[diff] [blame]71CONFIG_SYS_FMAN_FW_ADDR=0x40900000
Tom Rinifa943162020-10-29 10:48:01 -0400[diff] [blame]72CONFIG_NVME=y
Minghuan Lian4743f412016-12-13 14:54:21 +0800[diff] [blame]73CONFIG_PCI=y
Minghuan Lian4743f412016-12-13 14:54:21 +0800[diff] [blame]74CONFIG_DM_PCI_COMPAT=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]75CONFIG_PCIE_LAYERSCAPE_RC=y
76CONFIG_PCIE_LAYERSCAPE_EP=y
Tom Rinifa911f82019-05-12 07:59:12 -0400[diff] [blame]77CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
Peng Ma6dff14c2019-01-30 19:14:47 +0800[diff] [blame]78CONFIG_DM_SCSI=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]79CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]80CONFIG_SPI=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]81CONFIG_DM_SPI=y
82CONFIG_FSL_DSPI=y
83CONFIG_FSL_QSPI=y
Tang Yuantian73259b42017-01-20 17:12:49 +0800[diff] [blame]84CONFIG_USB=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]85CONFIG_USB_XHCI_HCD=y
86CONFIG_USB_XHCI_DWC3=y