Johan Jonker | 50d9ff5 | 2022-04-15 23:21:34 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
| 3 | #include "rockchip-u-boot.dtsi" |
| 4 | |
| 5 | / { |
| 6 | bus_intmem@10080000 { |
| 7 | compatible = "mmio-sram"; |
| 8 | reg = <0x10080000 0x9000>; |
| 9 | #address-cells = <1>; |
| 10 | #size-cells = <1>; |
| 11 | ranges = <0 0x10080000 0x9000>; |
| 12 | |
| 13 | smp-sram@0 { |
| 14 | compatible = "rockchip,rk322x-smp-sram"; |
| 15 | reg = <0x00 0x10>; |
| 16 | }; |
| 17 | |
| 18 | ddr_sram: ddr-sram@1000 { |
| 19 | compatible = "rockchip,rk322x-ddr-sram"; |
| 20 | reg = <0x1000 0x8000>; |
| 21 | }; |
| 22 | }; |
| 23 | |
| 24 | dmc: dmc@11200000 { |
| 25 | compatible = "rockchip,rk3228-dmc", "syscon"; |
| 26 | reg = <0x11200000 0x3fc |
| 27 | 0x12000000 0x400>; |
| 28 | rockchip,cru = <&cru>; |
| 29 | rockchip,grf = <&grf>; |
| 30 | rockchip,msch = <&service_msch>; |
| 31 | rockchip,sram = <&ddr_sram>; |
| 32 | u-boot,dm-pre-reloc; |
| 33 | }; |
| 34 | |
| 35 | service_msch: syscon@31090000 { |
| 36 | compatible = "rockchip,rk3228-msch", "syscon"; |
| 37 | reg = <0x31090000 0x2000>; |
| 38 | u-boot,dm-pre-reloc; |
| 39 | }; |
| 40 | }; |
| 41 | |
| 42 | &cru { |
| 43 | u-boot,dm-pre-reloc; |
| 44 | }; |
| 45 | |
| 46 | &emmc { |
| 47 | max-frequency = <150000000>; |
| 48 | }; |
| 49 | |
| 50 | &grf { |
| 51 | u-boot,dm-pre-reloc; |
| 52 | }; |
| 53 | |
| 54 | &sdmmc { |
| 55 | max-frequency = <150000000>; |
| 56 | }; |