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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Ben Warren7efe9272008-01-16 22:37:35 -05002/*
3 * Freescale non-CPM SPI Controller
4 *
5 * Copyright 2008 Qstreams Networks, Inc.
Ben Warren7efe9272008-01-16 22:37:35 -05006 */
7
8#ifndef _ASM_MPC8XXX_SPI_H_
9#define _ASM_MPC8XXX_SPI_H_
10
11#include <asm/types.h>
12
Mario Sixb2e701c2019-01-21 09:17:24 +010013#if defined(CONFIG_ARCH_MPC8308) || \
Mario Six9164bdd2019-01-21 09:17:25 +010014 defined(CONFIG_ARCH_MPC8313) || \
Mario Six0344f5e2019-01-21 09:17:27 +010015 defined(CONFIG_ARCH_MPC834X) || \
Mario Six60b11232019-01-21 09:17:29 +010016 defined(CONFIG_ARCH_MPC837X)
Ben Warren7efe9272008-01-16 22:37:35 -050017
Kim Phillipsb8e25202008-01-17 12:48:00 -060018typedef struct spi8xxx {
Ben Warren7efe9272008-01-16 22:37:35 -050019 u8 res0[0x20]; /* 0x0-0x01f reserved */
20 u32 mode; /* mode register */
21 u32 event; /* event register */
22 u32 mask; /* mask register */
23 u32 com; /* command register */
24 u32 tx; /* transmit register */
25 u32 rx; /* receive register */
Dave Liu3c627e82008-01-18 10:07:04 +080026 u8 res1[0xFC8]; /* fill up to 0x1000 */
Ben Warren7efe9272008-01-16 22:37:35 -050027} spi8xxx_t;
28
29#endif
30
31#endif /* _ASM_MPC8XXX_SPI_H_ */