Jim Liu | 147c000 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com |
| 3 | |
| 4 | /dts-v1/; |
| 5 | #include "nuvoton-npcm845.dtsi" |
Jim Liu | 89b2654 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 6 | #include "nuvoton-npcm845-pincfg.dtsi" |
Jim Liu | 147c000 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 7 | |
| 8 | / { |
| 9 | model = "Nuvoton npcm845 Development Board (Device Tree)"; |
| 10 | compatible = "nuvoton,npcm845-evb", "nuvoton,npcm845"; |
| 11 | |
| 12 | aliases { |
| 13 | serial0 = &serial0; |
Jim Liu | 89b2654 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 14 | i2c0 = &i2c0; |
| 15 | spi0 = &fiu0; |
| 16 | spi1 = &fiu1; |
| 17 | spi3 = &fiu3; |
| 18 | spi4 = &fiux; |
| 19 | spi5 = &spi1; |
| 20 | usb0 = &udc0; |
| 21 | usb1 = &ehci1; |
| 22 | usb2 = &ehci2; |
Jim Liu | 147c000 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 23 | }; |
| 24 | |
| 25 | chosen { |
| 26 | stdout-path = &serial0; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | reg = <0x0 0x0 0x0 0x40000000>; |
| 31 | }; |
Jim Liu | 89b2654 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 32 | |
| 33 | vsbr2: vsbr2 { |
| 34 | compatible = "regulator-npcm845"; |
| 35 | regulator-name = "vr2"; |
| 36 | regulator-min-microvolt = <1800000>; |
| 37 | regulator-max-microvolt = <3300000>; |
| 38 | regulator-always-on; |
| 39 | }; |
| 40 | |
| 41 | vsbv8: vsbv8 { |
| 42 | compatible = "regulator-npcm845"; |
| 43 | regulator-name = "v8"; |
| 44 | regulator-min-microvolt = <1800000>; |
| 45 | regulator-max-microvolt = <3300000>; |
| 46 | regulator-always-on; |
| 47 | }; |
| 48 | |
| 49 | vsbv5: vsbv5 { |
| 50 | compatible = "regulator-npcm845"; |
| 51 | regulator-name = "v5"; |
| 52 | regulator-min-microvolt = <1800000>; |
| 53 | regulator-max-microvolt = <3300000>; |
| 54 | regulator-always-on; |
| 55 | }; |
| 56 | |
Jim Liu | 147c000 | 2022-09-27 16:45:15 +0800 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | &serial0 { |
| 60 | status = "okay"; |
| 61 | }; |
| 62 | |
| 63 | &watchdog1 { |
| 64 | status = "okay"; |
| 65 | }; |
Jim Liu | 89b2654 | 2022-11-28 10:32:44 +0800 | [diff] [blame] | 66 | |
| 67 | &fiu0 { |
| 68 | status = "okay"; |
| 69 | pinctrl-names = "default"; |
| 70 | pinctrl-0 = <&spi0cs1_pins>; |
| 71 | spi-nor@0 { |
| 72 | compatible = "jedec,spi-nor"; |
| 73 | reg = <0>; |
| 74 | spi-max-frequency = <25000000>; |
| 75 | }; |
| 76 | spi_flash@1 { |
| 77 | compatible = "jedec,spi-nor"; |
| 78 | reg = <1>; |
| 79 | spi-max-frequency = <25000000>; |
| 80 | }; |
| 81 | }; |
| 82 | |
| 83 | &fiu1 { |
| 84 | status = "okay"; |
| 85 | spi-nor@0 { |
| 86 | compatible = "jedec,spi-nor"; |
| 87 | reg = <0>; |
| 88 | spi-max-frequency = <25000000>; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | &fiu3 { |
| 93 | pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>; |
| 94 | status = "okay"; |
| 95 | vqspi-supply = <&vsbv5>; |
| 96 | vqspi-microvolt = <3300000>; |
| 97 | spi-nor@0 { |
| 98 | compatible = "jedec,spi-nor"; |
| 99 | reg = <0>; |
| 100 | spi-max-frequency = <25000000>; |
| 101 | }; |
| 102 | }; |
| 103 | |
| 104 | &fiux { |
| 105 | nuvoton,spix-mode; |
| 106 | status = "okay"; |
| 107 | }; |
| 108 | |
| 109 | &spi1 { |
| 110 | status = "okay"; |
| 111 | }; |
| 112 | |
| 113 | &usbphy1 { |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | |
| 117 | &usbphy2 { |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &usbphy3 { |
| 122 | status = "okay"; |
| 123 | }; |
| 124 | |
| 125 | &udc0 { |
| 126 | status = "okay"; |
| 127 | phys = <&usbphy1 0>; |
| 128 | }; |
| 129 | |
| 130 | &sdhci0 { |
| 131 | bus-width = <0x8>; |
| 132 | status = "okay"; |
| 133 | }; |
| 134 | |
| 135 | &ehci1 { |
| 136 | status = "okay"; |
| 137 | phys = <&usbphy2 3>; |
| 138 | }; |
| 139 | |
| 140 | &ehci2 { |
| 141 | status = "okay"; |
| 142 | phys = <&usbphy3 4>; |
| 143 | }; |
| 144 | |
| 145 | &i2c0 { |
| 146 | status = "okay"; |
| 147 | }; |
| 148 | |
| 149 | &pinctrl { |
| 150 | pinctrl-names = "default"; |
| 151 | pinctrl-0 = < |
| 152 | &gspi_pins |
| 153 | &vgadig_pins |
| 154 | &spix_pins |
| 155 | &r1_pins |
| 156 | &r1en_pins |
| 157 | &r1oen_pins |
| 158 | >; |
| 159 | }; |