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Tom Rini6fb86c12022-12-02 16:42:21 -05001config FSL_TRUST_ARCH_v1
2 bool
3
Tom Rini65461122022-06-17 16:24:31 -04004config NXP_ESBC
5 bool "NXP ESBC (secure boot) functionality"
Tom Rini6fb86c12022-12-02 16:42:21 -05006 select FSL_TRUST_ARCH_v1 if ARCH_P3041 || ARCH_P4080 || \
7 ARCH_P5040 || ARCH_P2041
Tom Rini65461122022-06-17 16:24:31 -04008 help
9 Enable Freescale Secure Boot feature. Normally selected by defconfig.
10 If unsure, do not change.
11
12menu "Chain of trust / secure boot options"
Udit Agarwal22ec2382019-11-07 16:11:32 +000013 depends on !FIT_SIGNATURE && NXP_ESBC
Tom Rini65461122022-06-17 16:24:31 -040014
15config CHAIN_OF_TRUST
Tom Rinia5c4d402017-03-01 16:51:58 -050016 select FSL_CAAM
Gaurav Jainbd50fd12022-06-09 16:32:15 +053017 select ARCH_MISC_INIT
Tom Rini6fb86c12022-12-02 16:42:21 -050018 select FSL_ISBC_KEY_EXT if (ARM || FSL_CORENET) && !SYS_RAMBOOT
Tom Rini0b58c2e2022-06-16 14:04:39 -040019 select FSL_SEC_MON
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +080020 select SPL_BOARD_INIT if (ARM && SPL)
Alexandru Gagniuc97464ff2021-09-02 19:54:19 -050021 select SPL_HASH if (ARM && SPL)
Tom Rini5bdd9192017-05-15 12:17:49 -040022 select SHA_HW_ACCEL
23 select SHA_PROG_HW_ACCEL
Simon Glass73c18b42017-07-23 21:19:39 -060024 select ENV_IS_NOWHERE
Tom Rinifc2dcd92022-06-25 11:02:45 -040025 select SYS_CPC_REINIT_F if MPC85xx && !SYS_RAMBOOT
Sumit Garg13ad2902018-01-09 01:27:46 +053026 select CMD_EXT4 if ARM
27 select CMD_EXT4_WRITE if ARM
Tom Rini65461122022-06-17 16:24:31 -040028 imply CMD_BLOB
29 imply CMD_HASH if ARM
30 def_bool y
Simon Glassa6a9ea42017-05-17 03:25:16 -060031
32config CMD_ESBC_VALIDATE
33 bool "Enable the 'esbc_validate' and 'esbc_halt' commands"
Tom Riniaac187d2022-06-16 14:04:35 -040034 default y
Simon Glassa6a9ea42017-05-17 03:25:16 -060035 help
36 This option enables two commands used for secure booting:
37
38 esbc_validate - validate signature using RSA verification
39 esbc_halt - put the core in spin loop (Secure Boot Only)
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +053040
Tom Rinieb56a392022-06-16 14:04:37 -040041config ESBC_HDR_LS
42 bool
43
44config ESBC_ADDR_64BIT
45 def_bool y
46 depends on ESBC_HDR_LS && FSL_LAYERSCAPE
47 help
48 For Layerscape based platforms, ESBC image Address in Header is 64bit.
49
Tom Rini6fb86c12022-12-02 16:42:21 -050050config FSL_ISBC_KEY_EXT
51 bool
52 help
53 The key used for verification of next level images is picked up from
54 an Extension Table which has been verified by the ISBC (Internal
55 Secure boot Code) in boot ROM of the SoC. The feature is only
56 applicable in case of NOR boot and is not applicable in case of
57 RAMBOOT (NAND, SD, SPI). For Layerscape, this feature is available
58 for all device if IE Table is copied to XIP memory Also, for
59 Layerscape, ISBC doesn't verify this table.
60
Tom Rinia1663992022-06-16 14:04:40 -040061config SYS_FSL_SFP_BE
62 def_bool y
Tom Rini65461122022-06-17 16:24:31 -040063 depends on PPC || FSL_LSCH2 || ARCH_LS1021A
Tom Rinia1663992022-06-16 14:04:40 -040064
65config SYS_FSL_SFP_LE
66 def_bool y
Tom Rini65461122022-06-17 16:24:31 -040067 depends on !SYS_FSL_SFP_BE
Tom Rinia1663992022-06-16 14:04:40 -040068
69choice
70 prompt "SFP IP revision"
Tom Rinia1663992022-06-16 14:04:40 -040071 default SYS_FSL_SFP_VER_3_0 if PPC
72 default SYS_FSL_SFP_VER_3_4
73
74config SYS_FSL_SFP_VER_3_0
75 bool "SFP version 3.0"
76
77config SYS_FSL_SFP_VER_3_2
78 bool "SFP version 3.2"
79
80config SYS_FSL_SFP_VER_3_4
81 bool "SFP version 3.4"
82
83endchoice
84
Tom Rini27fcd312022-06-17 16:24:32 -040085config SPL_UBOOT_KEY_HASH
86 string "Non-SRK key hash for U-Boot public/private key pair"
87 depends on SPL
88 default ""
89 help
90 Set the key hash for U-Boot here if public/private key pair used to
91 sign U-boot are different from the SRK hash put in the fuse. Example
92 of a key hash is
93 41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b.
94 Otherwise leave this empty.
95
Tom Rinibf1dfd82022-06-17 16:24:34 -040096if PPC
97
98config BOOTSCRIPT_COPY_RAM
99 bool "Secure boot copies boot script to RAM"
100 help
101 On systems that support chain of trust booting, a number of addresses
102 are required to set variables that are used in the copying and then
103 verification of different parts of the system. If enabled, the subsequent
104 options are for what location to use in each step.
105
106config BS_ADDR_DEVICE
107 hex "Address in RAM for bs_device"
108 depends on BOOTSCRIPT_COPY_RAM
109
110config BS_SIZE
111 hex "The size of bs_size which is the amount read from bs_device"
112 depends on BOOTSCRIPT_COPY_RAM
113
114config BS_ADDR_RAM
115 hex "Address in RAM for bs_ram"
116 depends on BOOTSCRIPT_COPY_RAM
117
118config BS_HDR_ADDR_DEVICE
119 hex "Address in RAM for bs_hdr_device"
120 depends on BOOTSCRIPT_COPY_RAM
121
122config BS_HDR_SIZE
123 hex "The size of bs_hdr_size which is the amount read from bs_hdr_device"
124 depends on BOOTSCRIPT_COPY_RAM
125
126config BS_HDR_ADDR_RAM
127 hex "Address in RAM for bs_hdr_ram"
128 depends on BOOTSCRIPT_COPY_RAM
129
130config BOOTSCRIPT_HDR_ADDR
131 hex "CONFIG_BOOTSCRIPT_HDR_ADDR"
132 default BS_ADDR_RAM if BOOTSCRIPT_COPY_RAM
133
134endif
135
Tom Rinia1663992022-06-16 14:04:40 -0400136config SYS_FSL_SRK_LE
137 def_bool y
Tom Rini65461122022-06-17 16:24:31 -0400138 depends on ARM
Tom Rinia1663992022-06-16 14:04:40 -0400139
140config KEY_REVOCATION
141 def_bool y
Tom Rini65461122022-06-17 16:24:31 -0400142
143endmenu
144
145comment "Other functionality shared between NXP SoCs"
Tom Rinia1663992022-06-16 14:04:40 -0400146
Tom Rinib643ebd2022-03-24 17:17:58 -0400147config DEEP_SLEEP
148 bool "Enable SoC deep sleep feature"
Tom Riniaac187d2022-06-16 14:04:35 -0400149 depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A
150 default y
Tom Rinib643ebd2022-03-24 17:17:58 -0400151 help
152 Indicates this SoC supports deep sleep feature. If deep sleep is
153 supported, core will start to execute uboot when wakes up.
154
Tom Rini9d291f42022-06-20 08:07:44 -0400155config LAYERSCAPE_NS_ACCESS
156 bool "Layerscape non-secure access support"
157 depends on ARCH_LS1021A || FSL_LSCH2
158
Tom Rini7485ebf62022-06-20 08:07:45 -0400159config PCIE1
160 bool "PCIe controller #1"
161 depends on LAYERSCAPE_NS_ACCESS || PPC
162
163config PCIE2
164 bool "PCIe controller #2"
165 depends on LAYERSCAPE_NS_ACCESS || PPC
166
167config PCIE3
168 bool "PCIe controller #3"
169 depends on LAYERSCAPE_NS_ACCESS || PPC
170
171config PCIE4
172 bool "PCIe controller #4"
173 depends on LAYERSCAPE_NS_ACCESS || PPC
174
Stephen Carlsone36d49c2021-06-22 16:35:20 -0700175config FSL_USE_PCA9547_MUX
176 bool "Enable PCA9547 I2C Mux on Freescale boards"
Tom Riniaac187d2022-06-16 14:04:35 -0400177 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Stephen Carlsone36d49c2021-06-22 16:35:20 -0700178 help
179 This option enables the PCA9547 I2C mux on Freescale boards.
180
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100181config VID
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100182 bool "Enable Freescale VID"
Tom Riniaac187d2022-06-16 14:04:35 -0400183 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (I2C || DM_I2C)
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100184 help
185 This option enables setting core voltage based on individual
186 values saved in SoC fuses.
187
Tom Rini89cdcab2021-12-12 22:12:31 -0500188config SPL_VID
189 bool "Enable Freescale VID in SPL"
Tom Riniaac187d2022-06-16 14:04:35 -0400190 depends on (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3) && (SPL_I2C || DM_SPL_I2C)
Tom Rini89cdcab2021-12-12 22:12:31 -0500191 help
192 This option enables setting core voltage based on individual
193 values saved in SoC fuses, in SPL.
194
195if VID || SPL_VID
196
197config VID_FLS_ENV
198 string "Environment variable for overriding VDD"
199 help
200 This option allows for specifying the environment variable
201 to check to override VDD information.
202
203config VOL_MONITOR_INA220
204 bool "Enable the INA220 voltage monitor read"
205 help
206 This option enables INA220 voltage monitor read
207 functionality. It is used by the common VID driver.
208
209config VOL_MONITOR_IR36021_READ
210 bool "Enable the IR36021 voltage monitor read"
211 help
212 This option enables IR36021 voltage monitor read
213 functionality. It is used by the common VID driver.
214
215config VOL_MONITOR_IR36021_SET
216 bool "Enable the IR36021 voltage monitor set"
217 help
218 This option enables IR36021 voltage monitor set
219 functionality. It is used by the common VID driver.
220
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530221config VOL_MONITOR_LTC3882_READ
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530222 bool "Enable the LTC3882 voltage monitor read"
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530223 help
224 This option enables LTC3882 voltage monitor read
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100225 functionality. It is used by the common VID driver.
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530226
227config VOL_MONITOR_LTC3882_SET
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530228 bool "Enable the LTC3882 voltage monitor set"
Rajesh Bhagat241a3cc2018-01-17 16:13:04 +0530229 help
230 This option enables LTC3882 voltage monitor set
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100231 functionality. It is used by the common VID driver.
232
233config VOL_MONITOR_ISL68233_READ
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100234 bool "Enable the ISL68233 voltage monitor read"
235 help
236 This option enables ISL68233 voltage monitor read
237 functionality. It is used by the common VID driver.
238
239config VOL_MONITOR_ISL68233_SET
Stephen Carlsonc3301a22021-02-08 11:11:29 +0100240 bool "Enable the ISL68233 voltage monitor set"
241 help
242 This option enables ISL68233 voltage monitor set
243 functionality. It is used by the common VID driver.
Tom Rini89cdcab2021-12-12 22:12:31 -0500244
245endif
Tom Rinie24547a2022-03-30 18:07:32 -0400246
Tom Rinibc7b0df2022-07-31 21:08:27 -0400247config SYS_FSL_NUM_CC_PLLS
248 int "Number of clock control PLLs"
249 depends on MPC85xx || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A || ARCH_LS1028A
250 default 2 if ARCH_LS1021A || ARCH_LS1028A || FSL_LSCH2
251 default 6 if FSL_LSCH3 || MPC85xx
252
Tom Rinif4ec7132022-07-23 13:05:09 -0400253config SYS_FSL_ESDHC_BE
254 bool
255
256config SYS_FSL_IFC_BE
257 bool
258
Tom Rinie24547a2022-03-30 18:07:32 -0400259config FSL_QIXIS
260 bool "Enable QIXIS support"
Tom Riniaac187d2022-06-16 14:04:35 -0400261 depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Tom Rinie24547a2022-03-30 18:07:32 -0400262
263config QIXIS_I2C_ACCESS
264 bool "Access to QIXIS is over i2c"
265 depends on FSL_QIXIS
266 default y
Tom Rini41713012022-06-08 08:24:28 -0400267
268config HAS_FSL_DR_USB
269 def_bool y
270 depends on USB_EHCI_HCD && PPC
Tom Rinif552a132022-11-16 13:10:34 -0500271
272config SYS_DPAA_FMAN
273 bool