Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 - 2015 Xilinx, Inc. |
| 3 | * Michal Simek <michal.simek@xilinx.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <netdev.h> |
Michal Simek | b216cc1 | 2015-07-23 13:27:40 +0200 | [diff] [blame] | 10 | #include <ahci.h> |
| 11 | #include <scsi.h> |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 12 | #include <asm/arch/clk.h> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 13 | #include <asm/arch/hardware.h> |
| 14 | #include <asm/arch/sys_proto.h> |
| 15 | #include <asm/io.h> |
Siva Durga Prasad Paladugu | ba1f68e | 2015-08-04 13:03:26 +0530 | [diff] [blame] | 16 | #include <usb.h> |
| 17 | #include <dwc3-uboot.h> |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
| 21 | int board_init(void) |
| 22 | { |
Michal Simek | fb7242d | 2015-06-22 14:31:06 +0200 | [diff] [blame] | 23 | printf("EL Level:\tEL%d\n", current_el()); |
| 24 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 25 | return 0; |
| 26 | } |
| 27 | |
| 28 | int board_early_init_r(void) |
| 29 | { |
| 30 | u32 val; |
| 31 | |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 32 | if (current_el() == 3) { |
| 33 | val = readl(&crlapb_base->timestamp_ref_ctrl); |
| 34 | val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; |
| 35 | writel(val, &crlapb_base->timestamp_ref_ctrl); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 36 | |
Michal Simek | c23d3f8 | 2015-11-05 08:34:35 +0100 | [diff] [blame] | 37 | /* Program freq register in System counter */ |
| 38 | writel(zynqmp_get_system_timer_freq(), |
| 39 | &iou_scntr_secure->base_frequency_id_register); |
| 40 | /* And enable system counter */ |
| 41 | writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, |
| 42 | &iou_scntr_secure->counter_control_register); |
| 43 | } |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 44 | /* Program freq register in System counter and enable system counter */ |
| 45 | writel(gd->cpu_clk, &iou_scntr->base_frequency_id_register); |
| 46 | writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG | |
| 47 | ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, |
| 48 | &iou_scntr->counter_control_register); |
| 49 | |
| 50 | return 0; |
| 51 | } |
| 52 | |
| 53 | int dram_init(void) |
| 54 | { |
| 55 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
| 56 | |
| 57 | return 0; |
| 58 | } |
| 59 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 60 | void reset_cpu(ulong addr) |
| 61 | { |
| 62 | } |
| 63 | |
Michal Simek | b216cc1 | 2015-07-23 13:27:40 +0200 | [diff] [blame] | 64 | #ifdef CONFIG_SCSI_AHCI_PLAT |
| 65 | void scsi_init(void) |
| 66 | { |
| 67 | ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR); |
| 68 | scsi_scan(1); |
| 69 | } |
| 70 | #endif |
| 71 | |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 72 | int board_late_init(void) |
| 73 | { |
| 74 | u32 reg = 0; |
| 75 | u8 bootmode; |
| 76 | |
| 77 | reg = readl(&crlapb_base->boot_mode); |
| 78 | bootmode = reg & BOOT_MODES_MASK; |
| 79 | |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 80 | puts("Bootmode: "); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 81 | switch (bootmode) { |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 82 | case JTAG_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 83 | puts("JTAG_MODE\n"); |
| 84 | setenv("modeboot", "jtagboot"); |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 85 | break; |
| 86 | case QSPI_MODE_24BIT: |
| 87 | case QSPI_MODE_32BIT: |
| 88 | setenv("modeboot", "qspiboot"); |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 89 | puts("QSPI_MODE\n"); |
Siva Durga Prasad Paladugu | 30f0fc7 | 2015-03-13 11:10:26 +0530 | [diff] [blame] | 90 | break; |
Michal Simek | 02d66cd | 2015-04-15 15:02:28 +0200 | [diff] [blame] | 91 | case EMMC_MODE: |
Michal Simek | df7ff0a | 2015-10-05 15:59:38 +0200 | [diff] [blame] | 92 | puts("EMMC_MODE\n"); |
| 93 | setenv("modeboot", "sdboot"); |
| 94 | break; |
| 95 | case SD_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 96 | puts("SD_MODE\n"); |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 97 | setenv("modeboot", "sdboot"); |
| 98 | break; |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 99 | case SD_MODE1: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 100 | puts("SD_MODE1\n"); |
Michal Simek | 6d90245 | 2015-11-06 10:22:37 +0100 | [diff] [blame] | 101 | #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) |
| 102 | setenv("sdbootdev", "1"); |
| 103 | #endif |
| 104 | setenv("modeboot", "sdboot"); |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 105 | break; |
| 106 | case NAND_MODE: |
Michal Simek | c5d9523 | 2015-09-20 17:20:42 +0200 | [diff] [blame] | 107 | puts("NAND_MODE\n"); |
Michal Simek | 108e184 | 2015-10-05 10:51:12 +0200 | [diff] [blame] | 108 | setenv("modeboot", "nandboot"); |
| 109 | break; |
Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 110 | default: |
| 111 | printf("Invalid Boot Mode:0x%x\n", bootmode); |
| 112 | break; |
| 113 | } |
| 114 | |
| 115 | return 0; |
| 116 | } |
Siva Durga Prasad Paladugu | 650e0a3 | 2015-08-04 13:01:05 +0530 | [diff] [blame] | 117 | |
| 118 | int checkboard(void) |
| 119 | { |
Michal Simek | 47ce936 | 2016-01-25 11:04:21 +0100 | [diff] [blame] | 120 | puts("Board: Xilinx ZynqMP\n"); |
Siva Durga Prasad Paladugu | 650e0a3 | 2015-08-04 13:01:05 +0530 | [diff] [blame] | 121 | return 0; |
| 122 | } |
Siva Durga Prasad Paladugu | ba1f68e | 2015-08-04 13:03:26 +0530 | [diff] [blame] | 123 | |
| 124 | #ifdef CONFIG_USB_DWC3 |
| 125 | static struct dwc3_device dwc3_device_data = { |
| 126 | .maximum_speed = USB_SPEED_HIGH, |
| 127 | .base = ZYNQMP_USB0_XHCI_BASEADDR, |
| 128 | .dr_mode = USB_DR_MODE_PERIPHERAL, |
| 129 | .index = 0, |
| 130 | }; |
| 131 | |
| 132 | int usb_gadget_handle_interrupts(void) |
| 133 | { |
| 134 | dwc3_uboot_handle_interrupt(0); |
| 135 | return 0; |
| 136 | } |
| 137 | |
| 138 | int board_usb_init(int index, enum usb_init_type init) |
| 139 | { |
| 140 | return dwc3_uboot_init(&dwc3_device_data); |
| 141 | } |
| 142 | |
| 143 | int board_usb_cleanup(int index, enum usb_init_type init) |
| 144 | { |
| 145 | dwc3_uboot_exit(index); |
| 146 | return 0; |
| 147 | } |
| 148 | #endif |