blob: 969911d89ce127045ed41d1209d98e31430d308b [file] [log] [blame]
Marek Vasut5b3233e2019-03-04 12:28:31 +01001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source extras for U-Boot for the ULCB board
4 *
5 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
6 */
7
Marek Vasutadaa0162020-04-04 16:12:48 +02008#include "r8a77965-ulcb.dts"
Marek Vasut5b3233e2019-03-04 12:28:31 +01009#include "r8a77965-u-boot.dtsi"
10
11/ {
12 cpld {
13 compatible = "renesas,ulcb-cpld";
14 status = "okay";
15 gpio-sck = <&gpio6 8 0>;
16 gpio-mosi = <&gpio6 7 0>;
17 gpio-miso = <&gpio6 10 0>;
18 gpio-sstbz = <&gpio2 3 0>;
19 };
Marek Vasutc1728452021-07-03 18:16:14 +020020
21 sysinfo {
22 compatible = "renesas,rcar-sysinfo";
23 i2c-eeprom = <&sysinfo_eeprom>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070024 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020025 };
26};
27
28&i2c_dvfs {
Simon Glassd3a98cb2023-02-13 08:56:33 -070029 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020030
31 sysinfo_eeprom: eeprom@50 {
32 compatible = "rohm,br24t01", "atmel,24c01";
33 reg = <0x50>;
34 pagesize = <8>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070035 bootph-all;
Marek Vasutc1728452021-07-03 18:16:14 +020036 status = "okay";
37 };
Marek Vasut5b3233e2019-03-04 12:28:31 +010038};
39
Marek Vasutb4690062017-07-29 21:28:50 +020040&rpc {
41 reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
Marek Vasutf83c8342021-07-10 18:56:29 +020042 status = "disabled";
Marek Vasutb4690062017-07-29 21:28:50 +020043};
44
Marek Vasut5b3233e2019-03-04 12:28:31 +010045&sdhi0 {
46 sd-uhs-sdr12;
47 sd-uhs-sdr25;
48 sd-uhs-sdr104;
49 max-frequency = <208000000>;
50 status = "okay";
51};
52
53&sdhi2 {
Marek Vasuta6c719f2020-03-08 18:25:09 +010054 mmc-ddr-1_8v;
55 mmc-hs200-1_8v;
Marek Vasut5b3233e2019-03-04 12:28:31 +010056 mmc-hs400-1_8v;
57 max-frequency = <200000000>;
58 status = "okay";
59};
Marek Vasuta07df962019-03-18 03:20:31 +010060
61&vcc_sdhi0 {
62 u-boot,off-on-delay-us = <20000>;
63};