blob: a04e7c7a3ef94922fe3ed30db6d282fa0d0ed98b [file] [log] [blame]
Fabio Estevama7b1dc92011-05-13 03:15:11 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
Fabio Estevam60a7ec22011-09-22 08:07:20 +00004 * Configuration settings for the MX53SMD Freescale board.
Fabio Estevama7b1dc92011-05-13 03:15:11 +00005 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevama7b1dc92011-05-13 03:15:11 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#define CONFIG_MX53
13
Fabio Estevama7b1dc92011-05-13 03:15:11 +000014#define CONFIG_DISPLAY_CPUINFO
15#define CONFIG_DISPLAY_BOARDINFO
16
Fabio Estevam60a7ec22011-09-22 08:07:20 +000017#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
18
Fabio Estevama7b1dc92011-05-13 03:15:11 +000019#include <asm/arch/imx-regs.h>
20
21#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevama7b1dc92011-05-13 03:15:11 +000022#define CONFIG_SETUP_MEMORY_TAGS
23#define CONFIG_INITRD_TAG
Fabio Estevam5db5f412013-04-24 14:44:26 +000024#define CONFIG_REVISION_TAG
Fabio Estevama7b1dc92011-05-13 03:15:11 +000025
26/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28
29#define CONFIG_BOARD_EARLY_INIT_F
30#define CONFIG_MXC_GPIO
31
32#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010033#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevama7b1dc92011-05-13 03:15:11 +000034
35/* I2C Configs */
36#define CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +020037#define CONFIG_SYS_I2C
38#define CONFIG_SYS_I2C_MXC
Fabio Estevama7b1dc92011-05-13 03:15:11 +000039
40/* MMC Configs */
41#define CONFIG_FSL_ESDHC
42#define CONFIG_SYS_FSL_ESDHC_ADDR 0
43#define CONFIG_SYS_FSL_ESDHC_NUM 1
44
45#define CONFIG_MMC
46#define CONFIG_CMD_MMC
47#define CONFIG_GENERIC_MMC
48#define CONFIG_CMD_FAT
49#define CONFIG_DOS_PARTITION
50
51/* Eth Configs */
52#define CONFIG_HAS_ETH1
Fabio Estevama7b1dc92011-05-13 03:15:11 +000053#define CONFIG_MII
Fabio Estevama7b1dc92011-05-13 03:15:11 +000054
55#define CONFIG_FEC_MXC
56#define IMX_FEC_BASE FEC_BASE_ADDR
57#define CONFIG_FEC_MXC_PHYADDR 0x1F
58
59#define CONFIG_CMD_PING
60#define CONFIG_CMD_DHCP
61#define CONFIG_CMD_MII
62#define CONFIG_CMD_NET
63
64/* allow to overwrite serial and ethaddr */
65#define CONFIG_ENV_OVERWRITE
66#define CONFIG_CONS_INDEX 1
67#define CONFIG_BAUDRATE 115200
Fabio Estevama7b1dc92011-05-13 03:15:11 +000068
69/* Command definition */
70#include <config_cmd_default.h>
71
72#undef CONFIG_CMD_IMLS
73
74#define CONFIG_BOOTDELAY 3
75
Wolfgang Grandegger96529e22011-10-17 08:21:56 +000076#define CONFIG_ETHPRIME "FEC0"
Fabio Estevama7b1dc92011-05-13 03:15:11 +000077
78#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
79#define CONFIG_SYS_TEXT_BASE 0x77800000
80
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 "script=boot.scr\0" \
83 "uimage=uImage\0" \
84 "mmcdev=0\0" \
85 "mmcpart=2\0" \
86 "mmcroot=/dev/mmcblk0p3 rw\0" \
87 "mmcrootfstype=ext3 rootwait\0" \
88 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
89 "root=${mmcroot} " \
90 "rootfstype=${mmcrootfstype}\0" \
91 "loadbootscript=" \
92 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
93 "bootscript=echo Running bootscript from mmc ...; " \
94 "source\0" \
95 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
96 "mmcboot=echo Booting from mmc ...; " \
97 "run mmcargs; " \
98 "bootm\0" \
99 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
100 "root=/dev/nfs " \
101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
102 "netboot=echo Booting from net ...; " \
103 "run netargs; " \
104 "dhcp ${uimage}; bootm\0" \
105
106#define CONFIG_BOOTCOMMAND \
Andrew Bradforde1c7c8a2012-10-01 05:06:52 +0000107 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000108 "if run loadbootscript; then " \
109 "run bootscript; " \
110 "else " \
111 "if run loaduimage; then " \
112 "run mmcboot; " \
113 "else run netboot; " \
114 "fi; " \
115 "fi; " \
116 "else run netboot; fi"
117#define CONFIG_ARP_TIMEOUT 200UL
118
119/* Miscellaneous configurable options */
120#define CONFIG_SYS_LONGHELP /* undef to save memory */
121#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000122#define CONFIG_AUTO_COMPLETE
123#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
124
125/* Print Buffer Size */
126#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
127#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
128#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
129
130#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam4e499d62012-02-09 14:25:10 +0000131#define CONFIG_SYS_MEMTEST_END 0x70010000
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000132
133#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
134
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000135#define CONFIG_CMDLINE_EDITING
136
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000137/* Physical Memory Map */
138#define CONFIG_NR_DRAM_BANKS 2
139#define PHYS_SDRAM_1 CSD0_BASE_ADDR
140#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
141#define PHYS_SDRAM_2 CSD1_BASE_ADDR
142#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
143#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
144
145#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
146#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
147#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
148
149#define CONFIG_SYS_INIT_SP_OFFSET \
150 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
151#define CONFIG_SYS_INIT_SP_ADDR \
152 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
153
154/* FLASH and environment organization */
155#define CONFIG_SYS_NO_FLASH
156
157#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
158#define CONFIG_ENV_SIZE (8 * 1024)
159#define CONFIG_ENV_IS_IN_MMC
160#define CONFIG_SYS_MMC_ENV_DEV 0
161
162#define CONFIG_OF_LIBFDT
Fabio Estevama7b1dc92011-05-13 03:15:11 +0000163
164#endif /* __CONFIG_H */