| Paul Burton | 7fb0507 | 2013-11-08 11:18:49 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Imagination Technologies |
| 3 | * Author: Paul Burton <paul.burton@imgtec.com> |
| 4 | * |
| 5 | * Setup code for the FDC37M817 super I/O controller |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <asm/io.h> |
| 12 | |
| 13 | #define SIO_CONF_PORT 0x3f0 |
| 14 | #define SIO_DATA_PORT 0x3f1 |
| 15 | |
| 16 | enum sio_conf_key { |
| 17 | SIOCONF_DEVNUM = 0x07, |
| 18 | SIOCONF_ACTIVATE = 0x30, |
| 19 | SIOCONF_ENTER_SETUP = 0x55, |
| 20 | SIOCONF_BASE_HIGH = 0x60, |
| 21 | SIOCONF_BASE_LOW = 0x61, |
| 22 | SIOCONF_PRIMARY_INT = 0x70, |
| 23 | SIOCONF_EXIT_SETUP = 0xaa, |
| 24 | SIOCONF_MODE = 0xf0, |
| 25 | }; |
| 26 | |
| 27 | static struct { |
| 28 | u8 key; |
| 29 | u8 data; |
| 30 | } sio_config[] = { |
| 31 | /* tty0 */ |
| 32 | { SIOCONF_DEVNUM, 0x04 }, |
| 33 | { SIOCONF_BASE_HIGH, 0x03 }, |
| 34 | { SIOCONF_BASE_LOW, 0xf8 }, |
| 35 | { SIOCONF_MODE, 0x02 }, |
| 36 | { SIOCONF_PRIMARY_INT, 0x04 }, |
| 37 | { SIOCONF_ACTIVATE, 0x01 }, |
| 38 | |
| 39 | /* tty1 */ |
| 40 | { SIOCONF_DEVNUM, 0x05 }, |
| 41 | { SIOCONF_BASE_HIGH, 0x02 }, |
| 42 | { SIOCONF_BASE_LOW, 0xf8 }, |
| 43 | { SIOCONF_MODE, 0x02 }, |
| 44 | { SIOCONF_PRIMARY_INT, 0x03 }, |
| 45 | { SIOCONF_ACTIVATE, 0x01 }, |
| 46 | }; |
| 47 | |
| 48 | void malta_superio_init(void *io_base) |
| 49 | { |
| 50 | unsigned i; |
| 51 | |
| 52 | /* enter config state */ |
| 53 | writeb(SIOCONF_ENTER_SETUP, io_base + SIO_CONF_PORT); |
| 54 | |
| 55 | /* configure peripherals */ |
| 56 | for (i = 0; i < ARRAY_SIZE(sio_config); i++) { |
| 57 | writeb(sio_config[i].key, io_base + SIO_CONF_PORT); |
| 58 | writeb(sio_config[i].data, io_base + SIO_DATA_PORT); |
| 59 | } |
| 60 | |
| 61 | /* exit config state */ |
| 62 | writeb(SIOCONF_EXIT_SETUP, io_base + SIO_CONF_PORT); |
| 63 | } |