blob: efff465d0ff995a0b9a7ee8ddae0a31ccb314b34 [file] [log] [blame]
wdenkabf7a7c2003-12-08 01:34:36 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wang95bed1f2012-03-26 21:49:04 +00005 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
wdenkabf7a7c2003-12-08 01:34:36 +00008 */
9
10#include <common.h>
TsiChungLiew1692b482007-08-15 20:32:06 -050011#include <asm/immap.h>
Alison Wang95bed1f2012-03-26 21:49:04 +000012#include <asm/io.h>
wdenkabf7a7c2003-12-08 01:34:36 +000013
Simon Glass39f90ba2017-03-31 08:40:25 -060014DECLARE_GLOBAL_DATA_PTR;
wdenke65527f2004-02-12 00:47:09 +000015
16int checkboard (void) {
17 puts ("Board: ");
TsiChungLiew1692b482007-08-15 20:32:06 -050018 puts ("Freescale MCF5272C3 EVB\n");
wdenkabf7a7c2003-12-08 01:34:36 +000019 return 0;
wdenke65527f2004-02-12 00:47:09 +000020 };
21
Simon Glassd35f3382017-04-06 12:47:05 -060022int dram_init(void)
Simon Glassb4de3f32017-03-31 08:40:24 -060023{
Alison Wang95bed1f2012-03-26 21:49:04 +000024 sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM);
wdenke65527f2004-02-12 00:47:09 +000025
Alison Wang95bed1f2012-03-26 21:49:04 +000026 out_be16(&sdp->sdram_sdtr, 0xf539);
27 out_be16(&sdp->sdram_sdcr, 0x4211);
wdenke65527f2004-02-12 00:47:09 +000028
29 /* Dummy write to start SDRAM */
30 *((volatile unsigned long *)0) = 0;
31
Simon Glass39f90ba2017-03-31 08:40:25 -060032 gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
33
34 return 0;
wdenke65527f2004-02-12 00:47:09 +000035 };
36
37int testdram (void) {
38 /* TODO: XXX XXX XXX */
39 printf ("DRAM test not implemented!\n");
wdenkabf7a7c2003-12-08 01:34:36 +000040
wdenke65527f2004-02-12 00:47:09 +000041 return (0);
wdenkabf7a7c2003-12-08 01:34:36 +000042}