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git01.mediatek.com / filogic / uboot / d31ec8bb275e3b602d99979ffc0d05b9651a8f12 / . / tools / zynqmp_pm_cfg_obj_convert.py
blob: dd27f47921310446e8381815875ed21a68c3f247 [file] [log] [blame]
Luca Ceresoli168a5262019-05-21 18:06:44 +0200[diff] [blame]1#!/usr/bin/env python3
2# SPDX-License-Identifier: GPL-2.0+
3# Copyright (C) 2019 Luca Ceresoli <luca@lucaceresoli.net>
4
5import sys
6import re
7import struct
8import logging
9import argparse
10
11parser = argparse.ArgumentParser(
12 description='Convert a PMU configuration object from C source to a binary blob.')
13parser.add_argument('-D', '--debug', action="store_true")
14parser.add_argument(
15 "in_file", metavar='INPUT_FILE',
16 help='PMU configuration object (C source as produced by Xilinx XSDK)')
17parser.add_argument(
18 "out_file", metavar='OUTPUT_FILE',
19 help='PMU configuration object binary blob')
20args = parser.parse_args()
21
22logging.basicConfig(format='%(levelname)s:%(message)s',
23 level=(logging.DEBUG if args.debug else logging.WARNING))
24
25pm_define = {
26 'PM_CAP_ACCESS' : 0x1,
27 'PM_CAP_CONTEXT' : 0x2,
28 'PM_CAP_WAKEUP' : 0x4,
29
30 'NODE_UNKNOWN' : 0,
31 'NODE_APU' : 1,
32 'NODE_APU_0' : 2,
33 'NODE_APU_1' : 3,
34 'NODE_APU_2' : 4,
35 'NODE_APU_3' : 5,
36 'NODE_RPU' : 6,
37 'NODE_RPU_0' : 7,
38 'NODE_RPU_1' : 8,
39 'NODE_PLD' : 9,
40 'NODE_FPD' : 10,
41 'NODE_OCM_BANK_0' : 11,
42 'NODE_OCM_BANK_1' : 12,
43 'NODE_OCM_BANK_2' : 13,
44 'NODE_OCM_BANK_3' : 14,
45 'NODE_TCM_0_A' : 15,
46 'NODE_TCM_0_B' : 16,
47 'NODE_TCM_1_A' : 17,
48 'NODE_TCM_1_B' : 18,
49 'NODE_L2' : 19,
50 'NODE_GPU_PP_0' : 20,
51 'NODE_GPU_PP_1' : 21,
52 'NODE_USB_0' : 22,
53 'NODE_USB_1' : 23,
54 'NODE_TTC_0' : 24,
55 'NODE_TTC_1' : 25,
56 'NODE_TTC_2' : 26,
57 'NODE_TTC_3' : 27,
58 'NODE_SATA' : 28,
59 'NODE_ETH_0' : 29,
60 'NODE_ETH_1' : 30,
61 'NODE_ETH_2' : 31,
62 'NODE_ETH_3' : 32,
63 'NODE_UART_0' : 33,
64 'NODE_UART_1' : 34,
65 'NODE_SPI_0' : 35,
66 'NODE_SPI_1' : 36,
67 'NODE_I2C_0' : 37,
68 'NODE_I2C_1' : 38,
69 'NODE_SD_0' : 39,
70 'NODE_SD_1' : 40,
71 'NODE_DP' : 41,
72 'NODE_GDMA' : 42,
73 'NODE_ADMA' : 43,
74 'NODE_NAND' : 44,
75 'NODE_QSPI' : 45,
76 'NODE_GPIO' : 46,
77 'NODE_CAN_0' : 47,
78 'NODE_CAN_1' : 48,
79 'NODE_EXTERN' : 49,
80 'NODE_APLL' : 50,
81 'NODE_VPLL' : 51,
82 'NODE_DPLL' : 52,
83 'NODE_RPLL' : 53,
84 'NODE_IOPLL' : 54,
85 'NODE_DDR' : 55,
86 'NODE_IPI_APU' : 56,
87 'NODE_IPI_RPU_0' : 57,
88 'NODE_GPU' : 58,
89 'NODE_PCIE' : 59,
90 'NODE_PCAP' : 60,
91 'NODE_RTC' : 61,
92 'NODE_LPD' : 62,
93 'NODE_VCU' : 63,
94 'NODE_IPI_RPU_1' : 64,
95 'NODE_IPI_PL_0' : 65,
96 'NODE_IPI_PL_1' : 66,
97 'NODE_IPI_PL_2' : 67,
98 'NODE_IPI_PL_3' : 68,
99 'NODE_PL' : 69,
100 'NODE_ID_MA' : 70,
101
102 'XILPM_RESET_PCIE_CFG' : 1000,
103 'XILPM_RESET_PCIE_BRIDGE' : 1001,
104 'XILPM_RESET_PCIE_CTRL' : 1002,
105 'XILPM_RESET_DP' : 1003,
106 'XILPM_RESET_SWDT_CRF' : 1004,
107 'XILPM_RESET_AFI_FM5' : 1005,
108 'XILPM_RESET_AFI_FM4' : 1006,
109 'XILPM_RESET_AFI_FM3' : 1007,
110 'XILPM_RESET_AFI_FM2' : 1008,
111 'XILPM_RESET_AFI_FM1' : 1009,
112 'XILPM_RESET_AFI_FM0' : 1010,
113 'XILPM_RESET_GDMA' : 1011,
114 'XILPM_RESET_GPU_PP1' : 1012,
115 'XILPM_RESET_GPU_PP0' : 1013,
116 'XILPM_RESET_GPU' : 1014,
117 'XILPM_RESET_GT' : 1015,
118 'XILPM_RESET_SATA' : 1016,
119 'XILPM_RESET_ACPU3_PWRON' : 1017,
120 'XILPM_RESET_ACPU2_PWRON' : 1018,
121 'XILPM_RESET_ACPU1_PWRON' : 1019,
122 'XILPM_RESET_ACPU0_PWRON' : 1020,
123 'XILPM_RESET_APU_L2' : 1021,
124 'XILPM_RESET_ACPU3' : 1022,
125 'XILPM_RESET_ACPU2' : 1023,
126 'XILPM_RESET_ACPU1' : 1024,
127 'XILPM_RESET_ACPU0' : 1025,
128 'XILPM_RESET_DDR' : 1026,
129 'XILPM_RESET_APM_FPD' : 1027,
130 'XILPM_RESET_SOFT' : 1028,
131 'XILPM_RESET_GEM0' : 1029,
132 'XILPM_RESET_GEM1' : 1030,
133 'XILPM_RESET_GEM2' : 1031,
134 'XILPM_RESET_GEM3' : 1032,
135 'XILPM_RESET_QSPI' : 1033,
136 'XILPM_RESET_UART0' : 1034,
137 'XILPM_RESET_UART1' : 1035,
138 'XILPM_RESET_SPI0' : 1036,
139 'XILPM_RESET_SPI1' : 1037,
140 'XILPM_RESET_SDIO0' : 1038,
141 'XILPM_RESET_SDIO1' : 1039,
142 'XILPM_RESET_CAN0' : 1040,
143 'XILPM_RESET_CAN1' : 1041,
144 'XILPM_RESET_I2C0' : 1042,
145 'XILPM_RESET_I2C1' : 1043,
146 'XILPM_RESET_TTC0' : 1044,
147 'XILPM_RESET_TTC1' : 1045,
148 'XILPM_RESET_TTC2' : 1046,
149 'XILPM_RESET_TTC3' : 1047,
150 'XILPM_RESET_SWDT_CRL' : 1048,
151 'XILPM_RESET_NAND' : 1049,
152 'XILPM_RESET_ADMA' : 1050,
153 'XILPM_RESET_GPIO' : 1051,
154 'XILPM_RESET_IOU_CC' : 1052,
155 'XILPM_RESET_TIMESTAMP' : 1053,
156 'XILPM_RESET_RPU_R50' : 1054,
157 'XILPM_RESET_RPU_R51' : 1055,
158 'XILPM_RESET_RPU_AMBA' : 1056,
159 'XILPM_RESET_OCM' : 1057,
160 'XILPM_RESET_RPU_PGE' : 1058,
161 'XILPM_RESET_USB0_CORERESET' : 1059,
162 'XILPM_RESET_USB1_CORERESET' : 1060,
163 'XILPM_RESET_USB0_HIBERRESET' : 1061,
164 'XILPM_RESET_USB1_HIBERRESET' : 1062,
165 'XILPM_RESET_USB0_APB' : 1063,
166 'XILPM_RESET_USB1_APB' : 1064,
167 'XILPM_RESET_IPI' : 1065,
168 'XILPM_RESET_APM_LPD' : 1066,
169 'XILPM_RESET_RTC' : 1067,
170 'XILPM_RESET_SYSMON' : 1068,
171 'XILPM_RESET_AFI_FM6' : 1069,
172 'XILPM_RESET_LPD_SWDT' : 1070,
173 'XILPM_RESET_FPD' : 1071,
174 'XILPM_RESET_RPU_DBG1' : 1072,
175 'XILPM_RESET_RPU_DBG0' : 1073,
176 'XILPM_RESET_DBG_LPD' : 1074,
177 'XILPM_RESET_DBG_FPD' : 1075,
178 'XILPM_RESET_APLL' : 1076,
179 'XILPM_RESET_DPLL' : 1077,
180 'XILPM_RESET_VPLL' : 1078,
181 'XILPM_RESET_IOPLL' : 1079,
182 'XILPM_RESET_RPLL' : 1080,
183 'XILPM_RESET_GPO3_PL_0' : 1081,
184 'XILPM_RESET_GPO3_PL_1' : 1082,
185 'XILPM_RESET_GPO3_PL_2' : 1083,
186 'XILPM_RESET_GPO3_PL_3' : 1084,
187 'XILPM_RESET_GPO3_PL_4' : 1085,
188 'XILPM_RESET_GPO3_PL_5' : 1086,
189 'XILPM_RESET_GPO3_PL_6' : 1087,
190 'XILPM_RESET_GPO3_PL_7' : 1088,
191 'XILPM_RESET_GPO3_PL_8' : 1089,
192 'XILPM_RESET_GPO3_PL_9' : 1090,
193 'XILPM_RESET_GPO3_PL_10' : 1091,
194 'XILPM_RESET_GPO3_PL_11' : 1092,
195 'XILPM_RESET_GPO3_PL_12' : 1093,
196 'XILPM_RESET_GPO3_PL_13' : 1094,
197 'XILPM_RESET_GPO3_PL_14' : 1095,
198 'XILPM_RESET_GPO3_PL_15' : 1096,
199 'XILPM_RESET_GPO3_PL_16' : 1097,
200 'XILPM_RESET_GPO3_PL_17' : 1098,
201 'XILPM_RESET_GPO3_PL_18' : 1099,
202 'XILPM_RESET_GPO3_PL_19' : 1100,
203 'XILPM_RESET_GPO3_PL_20' : 1101,
204 'XILPM_RESET_GPO3_PL_21' : 1102,
205 'XILPM_RESET_GPO3_PL_22' : 1103,
206 'XILPM_RESET_GPO3_PL_23' : 1104,
207 'XILPM_RESET_GPO3_PL_24' : 1105,
208 'XILPM_RESET_GPO3_PL_25' : 1106,
209 'XILPM_RESET_GPO3_PL_26' : 1107,
210 'XILPM_RESET_GPO3_PL_27' : 1108,
211 'XILPM_RESET_GPO3_PL_28' : 1109,
212 'XILPM_RESET_GPO3_PL_29' : 1110,
213 'XILPM_RESET_GPO3_PL_30' : 1111,
214 'XILPM_RESET_GPO3_PL_31' : 1112,
215 'XILPM_RESET_RPU_LS' : 1113,
216 'XILPM_RESET_PS_ONLY' : 1114,
217 'XILPM_RESET_PL' : 1115,
218 'XILPM_RESET_GPIO5_EMIO_92' : 1116,
219 'XILPM_RESET_GPIO5_EMIO_93' : 1117,
220 'XILPM_RESET_GPIO5_EMIO_94' : 1118,
221 'XILPM_RESET_GPIO5_EMIO_95' : 1119,
222
223 'PM_CONFIG_MASTER_SECTION_ID' : 0x101,
224 'PM_CONFIG_SLAVE_SECTION_ID' : 0x102,
225 'PM_CONFIG_PREALLOC_SECTION_ID' : 0x103,
226 'PM_CONFIG_POWER_SECTION_ID' : 0x104,
227 'PM_CONFIG_RESET_SECTION_ID' : 0x105,
228 'PM_CONFIG_SHUTDOWN_SECTION_ID' : 0x106,
229 'PM_CONFIG_SET_CONFIG_SECTION_ID' : 0x107,
230 'PM_CONFIG_GPO_SECTION_ID' : 0x108,
231
232 'PM_SLAVE_FLAG_IS_SHAREABLE' : 0x1,
233 'PM_MASTER_USING_SLAVE_MASK' : 0x2,
234
235 'PM_CONFIG_GPO1_MIO_PIN_34_MAP' : (1 << 10),
236 'PM_CONFIG_GPO1_MIO_PIN_35_MAP' : (1 << 11),
237 'PM_CONFIG_GPO1_MIO_PIN_36_MAP' : (1 << 12),
238 'PM_CONFIG_GPO1_MIO_PIN_37_MAP' : (1 << 13),
239
240 'PM_CONFIG_GPO1_BIT_2_MASK' : (1 << 2),
241 'PM_CONFIG_GPO1_BIT_3_MASK' : (1 << 3),
242 'PM_CONFIG_GPO1_BIT_4_MASK' : (1 << 4),
243 'PM_CONFIG_GPO1_BIT_5_MASK' : (1 << 5),
244
245 'SUSPEND_TIMEOUT' : 0xFFFFFFFF,
246
247 'PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK' : 0x00000001,
248 'PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK' : 0x00000100,
249 'PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK' : 0x00000200,
250}
251
252in_file = open(args.in_file, mode='r')
253out_file = open(args.out_file, mode='wb')
254
255num_re = re.compile(r"^([0-9]+)U?$")
256const_re = re.compile(r"^([A-Z_][A-Z0-9_]*)$")
257
258def process_item(item):
259 logging.debug("* ITEM " + item)
260
261 value = 0
262 for item in item.split('|'):
263 item = item.strip()
264
265 num_match = num_re .match(item)
266 const_match = const_re.match(item)
267
268 if num_match:
269 num = int(num_match.group(1))
270 logging.debug(" - num " + str(num))
271 value |= num
272 elif const_match:
273 name = const_match.group(1)
274 if not name in pm_define:
275 sys.stderr.write("Unknown define " + name + "!\n")
276 exit(1)
277 num = pm_define[name]
278 logging.debug(" - def " + hex(num))
279 value |= num
280
281 logging.debug(" = res " + hex(value))
282 out_file.write(struct.pack('<L', value))
283
284
285# Read all code
286code = in_file.read()
287
288# remove comments
289code = re.sub('//.*?\n|/\*.*?\*/', '', code, flags=re.DOTALL)
290
291# remove everything outside the XPm_ConfigObject array definition
292code = re.search('const u32 XPm_ConfigObject.*= {\n(.*)};',
293 code, flags=re.DOTALL).group(1)
294
295# Process each comma-separated array item
296for item in code.split(','):
297 item = item.strip()
298 if item:
299 process_item(item)
300
301print("Wrote %d bytes" % out_file.tell())