blob: 24ec3ebea178bab89a9152602d689b4c1f63265a [file] [log] [blame]
Faiz Abbasf59396a2019-10-15 18:24:38 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6#include <asm/io.h>
7#include <clk.h>
8#include <common.h>
9#include <dm.h>
10
11#define UFS_SS_CTRL 0x4
12#define UFS_SS_RST_N_PCS BIT(0)
13#define UFS_SS_CLK_26MHZ BIT(4)
14
15static int ti_j721e_ufs_probe(struct udevice *dev)
16{
17 void __iomem *base;
18 unsigned int clock;
19 struct clk clk;
20 u32 reg = 0;
21 int ret;
22
23 ret = clk_get_by_index(dev, 0, &clk);
24 if (ret) {
25 dev_err(dev, "failed to get M-PHY clock\n");
26 return ret;
27 }
28
29 clock = clk_get_rate(&clk);
30 if (IS_ERR_VALUE(clock)) {
31 dev_err(dev, "failed to get rate\n");
32 return ret;
33 }
34
35 base = dev_remap_addr_index(dev, 0);
36
37 if (clock == 26000000)
38 reg |= UFS_SS_CLK_26MHZ;
39 /* Take UFS slave device out of reset */
40 reg |= UFS_SS_RST_N_PCS;
41 writel(reg, base + UFS_SS_CTRL);
42
43 return 0;
44}
45
46static int ti_j721e_ufs_remove(struct udevice *dev)
47{
48 void __iomem *base = dev_remap_addr_index(dev, 0);
49 u32 reg = readl(base + UFS_SS_CTRL);
50
51 reg &= ~UFS_SS_RST_N_PCS;
52 writel(reg, base + UFS_SS_CTRL);
53
54 return 0;
55}
56
57static const struct udevice_id ti_j721e_ufs_ids[] = {
58 {
59 .compatible = "ti,j721e-ufs",
60 },
61 {},
62};
63
64U_BOOT_DRIVER(ti_j721e_ufs) = {
65 .name = "ti-j721e-ufs",
66 .id = UCLASS_MISC,
67 .of_match = ti_j721e_ufs_ids,
68 .probe = ti_j721e_ufs_probe,
69 .remove = ti_j721e_ufs_remove,
70 .flags = DM_FLAG_OS_PREPARE,
71};