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Stefano Babic6ec4b952012-10-10 21:11:46 +00001/*
2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3 *
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5 *
6 * Configuration for the woodburn board.
7 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Stefano Babic6ec4b952012-10-10 21:11:46 +00009 */
10
11#ifndef __WOODBURN_COMMON_CONFIG_H
12#define __WOODBURN_COMMON_CONFIG_H
13
14#include <asm/arch/imx-regs.h>
15
16 /* High Level Configuration Options */
Stefano Babic6ec4b952012-10-10 21:11:46 +000017#define CONFIG_MX35
18#define CONFIG_MX35_HCLK_FREQ 24000000
Gong Qianyu52de2e52015-10-26 19:47:42 +080019#define CONFIG_SYS_FSL_CLK
Stefano Babic6ec4b952012-10-10 21:11:46 +000020
21#define CONFIG_SYS_DCACHE_OFF
Stefano Babic6ec4b952012-10-10 21:11:46 +000022
Stefano Babic6ec4b952012-10-10 21:11:46 +000023#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
24
25/* This is required to setup the ESDC controller */
26
27#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28#define CONFIG_REVISION_TAG
29#define CONFIG_SETUP_MEMORY_TAGS
30#define CONFIG_INITRD_TAG
31
32/*
33 * Size of malloc() pool
34 */
35#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
36
37/*
38 * Hardware drivers
39 */
trem03997412013-09-21 18:13:36 +020040#define CONFIG_SYS_I2C
41#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020042#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
43#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070044#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
trem03997412013-09-21 18:13:36 +020045#define CONFIG_SYS_SPD_BUS_NUM 0
Stefano Babic6ec4b952012-10-10 21:11:46 +000046#define CONFIG_MXC_SPI
47#define CONFIG_MXC_GPIO
48
49/* PMIC Controller */
Stefano Babicaba29e42012-12-08 12:02:45 +010050#define CONFIG_POWER
51#define CONFIG_POWER_I2C
52#define CONFIG_POWER_FSL
Simon Glass02229812014-05-20 06:01:34 -060053#define CONFIG_POWER_FSL_MC13892
Stefano Babic6ec4b952012-10-10 21:11:46 +000054#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
55#define CONFIG_RTC_MC13XXX
56
Stefano Babic6ec4b952012-10-10 21:11:46 +000057/* mmc driver */
Stefano Babic6ec4b952012-10-10 21:11:46 +000058#define CONFIG_FSL_ESDHC
59#define CONFIG_SYS_FSL_ESDHC_ADDR 0
60#define CONFIG_SYS_FSL_ESDHC_NUM 1
61
62/*
63 * UART (console)
64 */
65#define CONFIG_MXC_UART
66#define CONFIG_MXC_UART_BASE UART1_BASE
67
68/* allow to overwrite serial and ethaddr */
69#define CONFIG_ENV_OVERWRITE
70#define CONFIG_CONS_INDEX 1
Stefano Babic6ec4b952012-10-10 21:11:46 +000071
72/*
73 * Command definition
74 */
Stefano Babic6ec4b952012-10-10 21:11:46 +000075#define CONFIG_BOOTP_SUBNETMASK
76#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_DNS
78
Stefano Babic6ec4b952012-10-10 21:11:46 +000079#define CONFIG_MXC_GPIO
80
81#define CONFIG_NET_RETRY_COUNT 100
82
Stefano Babic6ec4b952012-10-10 21:11:46 +000083
84#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
85
Stefano Babic6ec4b952012-10-10 21:11:46 +000086/*
87 * Ethernet on SOC (FEC)
88 */
89#define CONFIG_FEC_MXC
90#define IMX_FEC_BASE FEC_BASE_ADDR
Stefano Babic6ec4b952012-10-10 21:11:46 +000091#define CONFIG_FEC_MXC_PHYADDR 0x1
92
93#define CONFIG_MII
94#define CONFIG_DISCOVER_PHY
95
96#define CONFIG_ARP_TIMEOUT 200UL
97
98/*
99 * Miscellaneous configurable options
100 */
101#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefano Babic6ec4b952012-10-10 21:11:46 +0000102#define CONFIG_CMDLINE_EDITING
Stefano Babic6ec4b952012-10-10 21:11:46 +0000103
104#define CONFIG_AUTO_COMPLETE
Stefano Babic6ec4b952012-10-10 21:11:46 +0000105
106#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
107#define CONFIG_SYS_MEMTEST_END 0x10000
108
Stefano Babic6ec4b952012-10-10 21:11:46 +0000109#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
110
Stefano Babic6ec4b952012-10-10 21:11:46 +0000111/*
Stefano Babic6ec4b952012-10-10 21:11:46 +0000112 * Physical Memory Map
113 */
114#define CONFIG_NR_DRAM_BANKS 1
115#define PHYS_SDRAM_1 CSD0_BASE_ADDR
116#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
117
118#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
119
120#define CONFIG_SYS_GBL_DATA_OFFSET (LOW_LEVEL_SRAM_STACK - \
121 IRAM_BASE_ADDR - \
122 GENERATED_GBL_DATA_SIZE)
123#define CONFIG_SYS_INIT_SP_ADDR (IRAM_BASE_ADDR + \
124 CONFIG_SYS_GBL_DATA_OFFSET)
125
126/*
127 * MTD Command for mtdparts
128 */
Stefano Babic6ec4b952012-10-10 21:11:46 +0000129#define CONFIG_MTD_DEVICE
130#define CONFIG_FLASH_CFI_MTD
131#define CONFIG_MTD_PARTITIONS
132#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
133#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
134 "32m(rootfb)," \
135 "64m(pcache)," \
136 "64m(app1)," \
137 "10m(app2),-(spool);" \
138 "physmap-flash.0:512k(u-boot),64k(env1)," \
139 "64k(env2),3776k(kernel1),3776k(kernel2)"
140
141/*
142 * FLASH and environment organization
143 */
144#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
145#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
146#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
147/* Monitor at beginning of flash */
148#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
149#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
150
151#define CONFIG_ENV_SECT_SIZE (128 * 1024)
152#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
153
154/* Address and size of Redundant Environment Sector */
155#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
156#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
157
158#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
159 CONFIG_SYS_MONITOR_LEN)
160
Stefano Babic6ec4b952012-10-10 21:11:46 +0000161/*
162 * CFI FLASH driver setup
163 */
164#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
165#define CONFIG_FLASH_CFI_DRIVER
166
167/* A non-standard buffered write algorithm */
168#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
169#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
170
171/*
172 * NAND FLASH driver setup
173 */
174#define CONFIG_NAND_MXC
175#define CONFIG_NAND_MXC_V1_1
176#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
177#define CONFIG_SYS_MAX_NAND_DEVICE 1
178#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
179#define CONFIG_MXC_NAND_HWECC
180#define CONFIG_SYS_NAND_LARGEPAGE
181
182#if 0
183#define CONFIG_MTD_DEBUG
184#define CONFIG_MTD_DEBUG_VERBOSE 7
185#endif
186#define CONFIG_SYS_NAND_ONFI_DETECTION
187
188/*
189 * Default environment and default scripts
190 * to update uboot and load kernel
191 */
Stefano Babic6ec4b952012-10-10 21:11:46 +0000192
193#define CONFIG_HOSTNAME woodburn
194#define CONFIG_EXTRA_ENV_SETTINGS \
195 "netdev=eth0\0" \
196 "nfsargs=setenv bootargs root=/dev/nfs rw " \
197 "nfsroot=${serverip}:${rootpath}\0" \
198 "ramargs=setenv bootargs root=/dev/ram rw\0" \
199 "addip_sta=setenv bootargs ${bootargs} " \
200 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
201 ":${hostname}:${netdev}:off panic=1\0" \
202 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
203 "addip=if test -n ${ipdyn};then run addip_dyn;" \
204 "else run addip_sta;fi\0" \
205 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
206 "addtty=setenv bootargs ${bootargs}" \
207 " console=ttymxc0,${baudrate}\0" \
208 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
209 "loadaddr=80800000\0" \
210 "kernel_addr_r=80800000\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200211 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
212 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
213 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
Stefano Babic6ec4b952012-10-10 21:11:46 +0000214 "flash_self=run ramargs addip addtty addmtd addmisc;" \
215 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
216 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
217 "bootm ${kernel_addr}\0" \
218 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
219 "run nfsargs addip addtty addmtd addmisc;" \
220 "bootm ${kernel_addr_r}\0" \
221 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
222 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
223 "net_self=if run net_self_load;then " \
224 "run ramargs addip addtty addmtd addmisc;" \
225 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
226 "else echo Images not loades;fi\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200227 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
Stefano Babic6ec4b952012-10-10 21:11:46 +0000228 "load=tftp ${loadaddr} ${u-boot}\0" \
Anatolij Gustschinc9d1bac2014-10-24 20:13:51 +0200229 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
Stefano Babic6ec4b952012-10-10 21:11:46 +0000230 "update=protect off ${uboot_addr} +80000;" \
231 "erase ${uboot_addr} +80000;" \
232 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
233 "upd=if run load;then echo Updating u-boot;if run update;" \
234 "then echo U-Boot updated;" \
235 "else echo Error updating u-boot !;" \
236 "echo Board without bootloader !!;" \
237 "fi;" \
238 "else echo U-Boot not downloaded..exiting;fi\0" \
239 "bootcmd=run net_nfs\0"
240
241#endif /* __CONFIG_H */