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Wu, Josh3f338c12013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh3f338c12013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh3f338c12013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh3f338c12013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh3f338c12013-04-16 23:42:44 +000030
Wu, Josh3f338c12013-04-16 23:42:44 +000031/* LCD */
Wu, Josh3f338c12013-04-16 23:42:44 +000032#define LCD_BPP LCD_COLOR16
33#define LCD_OUTPUT_BPP 24
34#define CONFIG_LCD_LOGO
35#define CONFIG_LCD_INFO
36#define CONFIG_LCD_INFO_BELOW_LOGO
Wu, Josh3f338c12013-04-16 23:42:44 +000037#define CONFIG_ATMEL_HLCD
38#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh3f338c12013-04-16 23:42:44 +000039
Wu, Josh3f338c12013-04-16 23:42:44 +000040/*
41 * BOOTP options
42 */
43#define CONFIG_BOOTP_BOOTFILESIZE
44#define CONFIG_BOOTP_BOOTPATH
45#define CONFIG_BOOTP_GATEWAY
46#define CONFIG_BOOTP_HOSTNAME
47
Wu, Josh3f338c12013-04-16 23:42:44 +000048#define CONFIG_NR_DRAM_BANKS 1
49#define CONFIG_SYS_SDRAM_BASE 0x20000000
50#define CONFIG_SYS_SDRAM_SIZE 0x08000000
51
52/*
53 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
54 * leaving the correct space for initial global data structure above
55 * that address while providing maximum stack area below.
56 */
57# define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang487d1132017-04-18 14:54:51 +080058 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Wu, Josh3f338c12013-04-16 23:42:44 +000059
60/* DataFlash */
61#ifdef CONFIG_CMD_SF
Wu, Josh3f338c12013-04-16 23:42:44 +000062#define CONFIG_SF_DEFAULT_SPEED 30000000
Wu, Josh3f338c12013-04-16 23:42:44 +000063#endif
64
65/* NAND flash */
66#ifdef CONFIG_CMD_NAND
67#define CONFIG_NAND_ATMEL
68#define CONFIG_SYS_MAX_NAND_DEVICE 1
69#define CONFIG_SYS_NAND_BASE 0x40000000
70#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
71#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010072#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
73#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Tom Rini00448d22017-07-28 21:31:42 -040074#endif
Wu, Josh3f338c12013-04-16 23:42:44 +000075
76/* PMECC & PMERRLOC */
77#define CONFIG_ATMEL_NAND_HWECC
78#define CONFIG_ATMEL_NAND_HW_PMECC
79#define CONFIG_PMECC_CAP 2
80#define CONFIG_PMECC_SECTOR_SIZE 512
81#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shen591ef582013-06-26 10:48:53 +080082
Wu, Josh3f338c12013-04-16 23:42:44 +000083#define CONFIG_MTD_PARTITIONS
84#define CONFIG_MTD_DEVICE
Wu, Josh3f338c12013-04-16 23:42:44 +000085#define MTDIDS_DEFAULT "nand0=atmel_nand"
86#define MTDPARTS_DEFAULT \
87 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
88 "256k(env),256k(env_redundant),256k(spare)," \
89 "512k(dtb),6M(kernel)ro,-(rootfs)"
90
91#define CONFIG_EXTRA_ENV_SETTINGS \
92 "console=console=ttyS0,115200\0" \
93 "mtdparts="MTDPARTS_DEFAULT"\0" \
94 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
95 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
96
Bo Shend2c26122013-04-24 10:46:18 +080097/* Ethernet */
98#define CONFIG_KS8851_MLL
99#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
100
Wu, Josh3f338c12013-04-16 23:42:44 +0000101#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
102
103#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
104#define CONFIG_SYS_MEMTEST_END 0x26e00000
105
Bo Shen8ed87832013-10-21 16:13:59 +0800106/* USB host */
107#ifdef CONFIG_CMD_USB
108#define CONFIG_USB_ATMEL
Bo Shen4a985df2013-10-21 16:14:00 +0800109#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shen8ed87832013-10-21 16:13:59 +0800110#define CONFIG_USB_OHCI_NEW
111#define CONFIG_SYS_USB_OHCI_CPU_INIT
112#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
113#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
114#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shen8ed87832013-10-21 16:13:59 +0800115#endif
116
Wu, Josh3f338c12013-04-16 23:42:44 +0000117#ifdef CONFIG_SYS_USE_SPIFLASH
118
119/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wu, Josh3f338c12013-04-16 23:42:44 +0000120#define CONFIG_ENV_OFFSET 0x5000
121#define CONFIG_ENV_SIZE 0x3000
122#define CONFIG_ENV_SECT_SIZE 0x1000
123#define CONFIG_BOOTCOMMAND \
124 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
125 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
126 "bootm 0x22000000"
127
128#elif defined(CONFIG_SYS_USE_NANDFLASH)
129
130/* bootstrap + u-boot + env + linux in nandflash */
Wenyou Yang487d1132017-04-18 14:54:51 +0800131#define CONFIG_ENV_OFFSET 0x120000
Wu, Josh3f338c12013-04-16 23:42:44 +0000132#define CONFIG_ENV_OFFSET_REDUND 0x100000
133#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
134#define CONFIG_BOOTCOMMAND \
135 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
136 "nand read 0x21000000 0x180000 0x080000;" \
137 "nand read 0x22000000 0x200000 0x400000;" \
138 "bootm 0x22000000 - 0x21000000"
139
140#else /* CONFIG_SYS_USE_MMC */
141
142/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh32abdfe2015-03-24 17:07:22 +0800143
144#ifdef CONFIG_ENV_IS_IN_MMC
145/* Use raw reserved sectors to save environment */
Wu, Josh3f338c12013-04-16 23:42:44 +0000146#define CONFIG_ENV_OFFSET 0x2000
147#define CONFIG_ENV_SIZE 0x1000
148#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh32abdfe2015-03-24 17:07:22 +0800149#else
150/* Use file in FAT file to save environment */
Wu, Josh32abdfe2015-03-24 17:07:22 +0800151#define CONFIG_ENV_SIZE 0x4000
152#endif
153
Wu, Josh3f338c12013-04-16 23:42:44 +0000154#define CONFIG_BOOTCOMMAND \
155 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
156 "fatload mmc 0:1 0x21000000 dtb;" \
157 "fatload mmc 0:1 0x22000000 uImage;" \
158 "bootm 0x22000000 - 0x21000000"
159
160#endif
161
Wu, Josh3f338c12013-04-16 23:42:44 +0000162#define CONFIG_SYS_LONGHELP
163#define CONFIG_CMDLINE_EDITING
164#define CONFIG_AUTO_COMPLETE
Wu, Josh3f338c12013-04-16 23:42:44 +0000165
166/*
167 * Size of malloc() pool
168 */
169#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shen9c709392015-03-27 14:23:36 +0800170
171/* SPL */
172#define CONFIG_SPL_FRAMEWORK
173#define CONFIG_SPL_TEXT_BASE 0x300000
174#define CONFIG_SPL_MAX_SIZE 0x6000
175#define CONFIG_SPL_STACK 0x308000
176
177#define CONFIG_SPL_BSS_START_ADDR 0x20000000
178#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
179#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
180#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
181
Bo Shen9c709392015-03-27 14:23:36 +0800182#define CONFIG_SYS_MONITOR_LEN (512 << 10)
183
184#define CONFIG_SYS_MASTER_CLOCK 132096000
185#define CONFIG_SYS_AT91_PLLA 0x20953f03
186#define CONFIG_SYS_MCKR 0x1301
187#define CONFIG_SYS_MCKR_CSS 0x1302
188
Bo Shen9c709392015-03-27 14:23:36 +0800189#ifdef CONFIG_SYS_USE_MMC
Bo Shen9c709392015-03-27 14:23:36 +0800190#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
191#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen9c709392015-03-27 14:23:36 +0800192
193#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800194#define CONFIG_SPL_NAND_DRIVERS
195#define CONFIG_SPL_NAND_BASE
196#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
197#define CONFIG_SYS_NAND_5_ADDR_CYCLE
198#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
199#define CONFIG_SYS_NAND_PAGE_COUNT 64
200#define CONFIG_SYS_NAND_OOBSIZE 64
201#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
202#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
203#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
204
205#elif CONFIG_SYS_USE_SPIFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800206#define CONFIG_SPL_SPI_LOAD
207#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
208
209#endif
Wu, Josh3f338c12013-04-16 23:42:44 +0000210
211#endif