blob: 03b08968f662ec50c4a6f3814c38398ed1ffa55c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Alexander Grafc3468482014-04-11 17:09:45 +02002/*
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
Alexander Grafc3468482014-04-11 17:09:45 +02004 */
5
6/*
7 * Corenet DS style board configuration file
8 */
9#ifndef __QEMU_PPCE500_H
10#define __QEMU_PPCE500_H
11
Alexander Grafc3468482014-04-11 17:09:45 +020012#define CONFIG_SYS_MPC85XX_NO_RESETVEC
13
14#define CONFIG_SYS_RAMBOOT
15
Alexander Grafc3468482014-04-11 17:09:45 +020016#define CONFIG_PCI1 1 /* PCI controller 1 */
17#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
18#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
19
20#define CONFIG_ENV_OVERWRITE
21
22#define CONFIG_ENABLE_36BIT_PHYS
23
24#define CONFIG_ADDR_MAP
25#define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
26
Alexander Grafc3468482014-04-11 17:09:45 +020027/* Needed to fill the ccsrbar pointer */
Alexander Grafc3468482014-04-11 17:09:45 +020028
29/* Virtual address to CCSRBAR */
30#define CONFIG_SYS_CCSRBAR 0xe0000000
31/* Physical address should be a function call */
32#ifndef __ASSEMBLY__
33extern unsigned long long get_phys_ccsrbar_addr_early(void);
Alexander Graf6a2aa502015-03-07 02:10:09 +010034#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
35#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
36#else
37#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
38#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
Alexander Grafc3468482014-04-11 17:09:45 +020039#endif
Alexander Graf6a2aa502015-03-07 02:10:09 +010040
Alexander Grafc3468482014-04-11 17:09:45 +020041/* Virtual address range for PCI region maps */
42#define CONFIG_SYS_PCI_MAP_START 0x80000000
43#define CONFIG_SYS_PCI_MAP_END 0xe8000000
44
45/* Virtual address to a temporary map if we need it (max 128MB) */
46#define CONFIG_SYS_TMPVIRT 0xe8000000
47
48/*
49 * DDR Setup
50 */
51#define CONFIG_VERY_BIG_RAM
52#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
53#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
54
55#define CONFIG_CHIP_SELECTS_PER_CTRL 0
56
57#define CONFIG_SYS_CLK_FREQ 33000000
58
Alexander Grafc3468482014-04-11 17:09:45 +020059#define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */
60
61#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
62
Alexander Grafc3468482014-04-11 17:09:45 +020063#define CONFIG_HWCONFIG
64
65#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000
66#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0
67#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000
68/* The assembler doesn't like typecast */
69#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
70 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
71 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
72#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
73
74#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
75 GENERATED_GBL_DATA_SIZE)
76#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
77
78#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
79#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
80
Alexander Grafc3468482014-04-11 17:09:45 +020081#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE 1
83#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
84
85#define CONFIG_SYS_BAUDRATE_TABLE \
86 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
87
88#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
89#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
90
Alexander Grafc3468482014-04-11 17:09:45 +020091/*
92 * General PCI
93 * Memory space is mapped 1-1, but I/O space must start from 0.
94 */
95
96#ifdef CONFIG_PCI
97#define CONFIG_PCI_INDIRECT_BRIDGE
Alexander Grafc3468482014-04-11 17:09:45 +020098
99#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
Alexander Grafc3468482014-04-11 17:09:45 +0200100#endif /* CONFIG_PCI */
101
102#define CONFIG_LBA48
Alexander Grafc3468482014-04-11 17:09:45 +0200103
104/*
105 * Environment
106 */
Alexander Grafc3468482014-04-11 17:09:45 +0200107
108#define CONFIG_LOADS_ECHO /* echo on for serial download */
109
Alexander Grafc3468482014-04-11 17:09:45 +0200110/*
Alexander Grafc3468482014-04-11 17:09:45 +0200111 * Miscellaneous configurable options
112 */
Alexander Grafc3468482014-04-11 17:09:45 +0200113#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
Alexander Grafc3468482014-04-11 17:09:45 +0200114
115/*
116 * For booting Linux, the board info and command line data
117 * have to be in the first 64 MB of memory, since this is
118 * the maximum mapped by the Linux kernel during initialization.
119 */
120#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
121#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
122
123/*
124 * Environment Configuration
125 */
126#define CONFIG_ROOTPATH "/opt/nfsroot"
127#define CONFIG_BOOTFILE "uImage"
128#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
129
130/* default location for tftp and bootm */
131#define CONFIG_LOADADDR 1000000
132
Alexander Grafc3468482014-04-11 17:09:45 +0200133#define CONFIG_BOOTCOMMAND \
134 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
135
136#endif /* __QEMU_PPCE500_H */