blob: 6e57bef896ff615c7d428020ede93d6e2aaad484 [file] [log] [blame]
Alison Wangefa9f282012-10-18 19:25:52 +00001/*
2 * Copyright 2010-2012 Freescale Semiconductor, Inc.
3 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <spi.h>
26#include <asm/io.h>
27#include <asm/immap.h>
28#include <mmc.h>
29#include <fsl_esdhc.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33int checkboard(void)
34{
35 /*
36 * need to to:
37 * Check serial flash size. if 2mb evb, else 8mb demo
38 */
39 puts("Board: ");
40 puts("Freescale MCF54418 Tower System\n");
41 return 0;
42};
43
44phys_size_t initdram(int board_type)
45{
46 u32 dramsize;
47
48#if defined(CONFIG_SERIAL_BOOT)
49 /*
50 * Serial Boot: The dram is already initialized in start.S
51 * only require to return DRAM size
52 */
53 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
54#else
55 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM);
56 ccm_t *ccm = (ccm_t *)MMAP_CCM;
57 gpio_t *gpio = (gpio_t *) MMAP_GPIO;
58 pm_t *pm = (pm_t *) MMAP_PM;
59 u32 i;
60
61 dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
62
63 for (i = 0x13; i < 0x20; i++) {
64 if (dramsize == (1 << i))
65 break;
66 }
67
68 out_8(&pm->pmcr0, 0x2E);
69 out_8(&gpio->mscr_sdram, 1);
70
71 clrbits_be16(&ccm->misccr2, CCM_MISCCR2_FBHALF);
72 setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK);
73
74 out_be32(&sdram->rcrcr, 0x40000000);
75 out_be32(&sdram->padcr, 0x01030203);
76
77 out_be32(&sdram->cr00, 0x01010101);
78 out_be32(&sdram->cr01, 0x00000101);
79 out_be32(&sdram->cr02, 0x01010100);
80 out_be32(&sdram->cr03, 0x01010000);
81 out_be32(&sdram->cr04, 0x00010101);
82 out_be32(&sdram->cr06, 0x00010100);
83 out_be32(&sdram->cr07, 0x00000001);
84 out_be32(&sdram->cr08, 0x01000001);
85 out_be32(&sdram->cr09, 0x00000100);
86 out_be32(&sdram->cr10, 0x00010001);
87 out_be32(&sdram->cr11, 0x00000200);
88 out_be32(&sdram->cr12, 0x01000002);
89 out_be32(&sdram->cr13, 0x00000000);
90 out_be32(&sdram->cr14, 0x00000100);
91 out_be32(&sdram->cr15, 0x02000100);
92 out_be32(&sdram->cr16, 0x02000407);
93 out_be32(&sdram->cr17, 0x02030007);
94 out_be32(&sdram->cr18, 0x02000100);
95 out_be32(&sdram->cr19, 0x0A030203);
96 out_be32(&sdram->cr20, 0x00020708);
97 out_be32(&sdram->cr21, 0x00050008);
98 out_be32(&sdram->cr22, 0x04030002);
99 out_be32(&sdram->cr23, 0x00000004);
100 out_be32(&sdram->cr24, 0x020A0000);
101 out_be32(&sdram->cr25, 0x0C00000E);
102 out_be32(&sdram->cr26, 0x00002004);
103 out_be32(&sdram->cr28, 0x00100010);
104 out_be32(&sdram->cr29, 0x00100010);
105 out_be32(&sdram->cr31, 0x07990000);
106 out_be32(&sdram->cr40, 0x00000000);
107 out_be32(&sdram->cr41, 0x00C80064);
108 out_be32(&sdram->cr42, 0x44520002);
109 out_be32(&sdram->cr43, 0x00C80023);
110 out_be32(&sdram->cr45, 0x0000C350);
111 out_be32(&sdram->cr56, 0x04000000);
112 out_be32(&sdram->cr57, 0x03000304);
113 out_be32(&sdram->cr58, 0x40040000);
114 out_be32(&sdram->cr59, 0xC0004004);
115 out_be32(&sdram->cr60, 0x0642C000);
116 out_be32(&sdram->cr61, 0x00000642);
117 asm("tpf");
118
119 out_be32(&sdram->cr09, 0x01000100);
120
121 udelay(100);
122#endif
123 return dramsize;
124};
125
126int testdram(void)
127{
128 return 0;
129}