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git01.mediatek.com / filogic / uboot / d29531c7702ef2e1ab348cdc5500df7458331142 / . / arch / arm / mach-stm32mp / stm32mp2 / stm32mp25x.c
blob: 7d2dab2201d89a6adfaf67ddd3c11281d61eacad [file] [log] [blame]
Patrice Chotardd29531c2023-10-27 16:43:04 +0200[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
2/*
3 * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
4 */
5
6#define LOG_CATEGORY LOGC_ARCH
7
8#include <common.h>
9#include <log.h>
10#include <syscon.h>
11#include <asm/io.h>
12#include <asm/arch/stm32.h>
13#include <asm/arch/sys_proto.h>
14
15/* SYSCFG register */
16#define SYSCFG_DEVICEID_OFFSET 0x6400
17#define SYSCFG_DEVICEID_DEV_ID_MASK GENMASK(11, 0)
18#define SYSCFG_DEVICEID_DEV_ID_SHIFT 0
19#define SYSCFG_DEVICEID_REV_ID_MASK GENMASK(31, 16)
20#define SYSCFG_DEVICEID_REV_ID_SHIFT 16
21
22/* Device Part Number (RPN) = OTP9 */
23#define RPN_SHIFT 0
24#define RPN_MASK GENMASK(31, 0)
25
26/* Package = bit 0:2 of OTP122 => STM32MP25_PKG defines
27 * - 000: Custom package
28 * - 011: TFBGA361 => AL = 10x10, 361 balls pith 0.5mm
29 * - 100: TFBGA424 => AK = 14x14, 424 balls pith 0.5mm
30 * - 101: TFBGA436 => AI = 18x18, 436 balls pith 0.5mm
31 * - others: Reserved
32 */
33#define PKG_SHIFT 0
34#define PKG_MASK GENMASK(2, 0)
35
36static u32 read_deviceid(void)
37{
38 void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
39
40 return readl(syscfg + SYSCFG_DEVICEID_OFFSET);
41}
42
43u32 get_cpu_dev(void)
44{
45 return (read_deviceid() & SYSCFG_DEVICEID_DEV_ID_MASK) >> SYSCFG_DEVICEID_DEV_ID_SHIFT;
46}
47
48u32 get_cpu_rev(void)
49{
50 return (read_deviceid() & SYSCFG_DEVICEID_REV_ID_MASK) >> SYSCFG_DEVICEID_REV_ID_SHIFT;
51}
52
53/* Get Device Part Number (RPN) from OTP */
54u32 get_cpu_type(void)
55{
56 return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
57}
58
59/* Get Package options from OTP */
60u32 get_cpu_package(void)
61{
62 return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
63}
64
65int get_eth_nb(void)
66{
67 int nb_eth;
68
69 switch (get_cpu_type()) {
70 case CPU_STM32MP257Fxx:
71 fallthrough;
72 case CPU_STM32MP257Dxx:
73 fallthrough;
74 case CPU_STM32MP257Cxx:
75 fallthrough;
76 case CPU_STM32MP257Axx:
77 nb_eth = 5; /* dual ETH with TSN support */
78 break;
79 case CPU_STM32MP253Fxx:
80 fallthrough;
81 case CPU_STM32MP253Dxx:
82 fallthrough;
83 case CPU_STM32MP253Cxx:
84 fallthrough;
85 case CPU_STM32MP253Axx:
86 nb_eth = 2; /* dual ETH */
87 break;
88 case CPU_STM32MP251Fxx:
89 fallthrough;
90 case CPU_STM32MP251Dxx:
91 fallthrough;
92 case CPU_STM32MP251Cxx:
93 fallthrough;
94 case CPU_STM32MP251Axx:
95 nb_eth = 1; /* single ETH */
96 break;
97 default:
98 nb_eth = 0;
99 break;
100 }
101
102 return nb_eth;
103}
104
105void get_soc_name(char name[SOC_NAME_SIZE])
106{
107 char *cpu_s, *cpu_r, *package;
108
109 cpu_s = "????";
110 cpu_r = "?";
111 package = "??";
112 if (get_cpu_dev() == CPU_DEV_STM32MP25) {
113 switch (get_cpu_type()) {
114 case CPU_STM32MP257Fxx:
115 cpu_s = "257F";
116 break;
117 case CPU_STM32MP257Dxx:
118 cpu_s = "257D";
119 break;
120 case CPU_STM32MP257Cxx:
121 cpu_s = "257C";
122 break;
123 case CPU_STM32MP257Axx:
124 cpu_s = "257A";
125 break;
126 case CPU_STM32MP255Fxx:
127 cpu_s = "255F";
128 break;
129 case CPU_STM32MP255Dxx:
130 cpu_s = "255D";
131 break;
132 case CPU_STM32MP255Cxx:
133 cpu_s = "255C";
134 break;
135 case CPU_STM32MP255Axx:
136 cpu_s = "255A";
137 break;
138 case CPU_STM32MP253Fxx:
139 cpu_s = "253F";
140 break;
141 case CPU_STM32MP253Dxx:
142 cpu_s = "253D";
143 break;
144 case CPU_STM32MP253Cxx:
145 cpu_s = "253C";
146 break;
147 case CPU_STM32MP253Axx:
148 cpu_s = "253A";
149 break;
150 case CPU_STM32MP251Fxx:
151 cpu_s = "251F";
152 break;
153 case CPU_STM32MP251Dxx:
154 cpu_s = "251D";
155 break;
156 case CPU_STM32MP251Cxx:
157 cpu_s = "251C";
158 break;
159 case CPU_STM32MP251Axx:
160 cpu_s = "251A";
161 break;
162 default:
163 cpu_s = "25??";
164 break;
165 }
166 /* REVISION */
167 switch (get_cpu_rev()) {
168 case CPU_REV1:
169 cpu_r = "A";
170 break;
171 default:
172 break;
173 }
174 /* PACKAGE */
175 switch (get_cpu_package()) {
176 case STM32MP25_PKG_CUSTOM:
177 package = "XX";
178 break;
179 case STM32MP25_PKG_AL_TBGA361:
180 package = "AL";
181 break;
182 case STM32MP25_PKG_AK_TBGA424:
183 package = "AK";
184 break;
185 case STM32MP25_PKG_AI_TBGA436:
186 package = "AI";
187 break;
188 default:
189 break;
190 }
191 }
192
193 snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s", cpu_s, package, cpu_r);
194}