| Patrice Chotard | d29531c | 2023-10-27 16:43:04 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause |
| 2 | /* |
| 3 | * Copyright (C) 2023, STMicroelectronics - All Rights Reserved |
| 4 | */ |
| 5 | |
| 6 | #define LOG_CATEGORY LOGC_ARCH |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <clk.h> |
| 10 | #include <cpu_func.h> |
| 11 | #include <debug_uart.h> |
| 12 | #include <env_internal.h> |
| 13 | #include <init.h> |
| 14 | #include <misc.h> |
| 15 | #include <wdt.h> |
| 16 | #include <asm/io.h> |
| 17 | #include <asm/arch/stm32.h> |
| 18 | #include <asm/arch/sys_proto.h> |
| 19 | #include <asm/system.h> |
| 20 | #include <dm/device.h> |
| 21 | #include <dm/lists.h> |
| 22 | #include <dm/uclass.h> |
| 23 | |
| 24 | /* |
| 25 | * early TLB into the .data section so that it not get cleared |
| 26 | * with 16kB alignment |
| 27 | */ |
| 28 | #define EARLY_TLB_SIZE 0xA000 |
| 29 | u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000); |
| 30 | |
| 31 | /* |
| 32 | * initialize the MMU and activate cache in U-Boot pre-reloc stage |
| 33 | * MMU/TLB is updated in enable_caches() for U-Boot after relocation |
| 34 | */ |
| 35 | static void early_enable_caches(void) |
| 36 | { |
| 37 | if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) |
| 38 | return; |
| 39 | |
| 40 | if (!(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))) { |
| 41 | gd->arch.tlb_size = EARLY_TLB_SIZE; |
| 42 | gd->arch.tlb_addr = (unsigned long)&early_tlb; |
| 43 | } |
| 44 | /* enable MMU (default configuration) */ |
| 45 | dcache_enable(); |
| 46 | } |
| 47 | |
| 48 | /* |
| 49 | * Early system init |
| 50 | */ |
| 51 | int arch_cpu_init(void) |
| 52 | { |
| 53 | icache_enable(); |
| 54 | early_enable_caches(); |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | void enable_caches(void) |
| 60 | { |
| 61 | /* deactivate the data cache, early enabled in arch_cpu_init() */ |
| 62 | dcache_disable(); |
| 63 | /* |
| 64 | * Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr |
| 65 | * to update the TLB location udpated in board_f.c::reserve_mmu |
| 66 | */ |
| 67 | gd->arch.tlb_fillptr = 0; |
| 68 | dcache_enable(); |
| 69 | } |
| 70 | |
| 71 | /* used when CONFIG_DISPLAY_CPUINFO is activated */ |
| 72 | int print_cpuinfo(void) |
| 73 | { |
| 74 | char name[SOC_NAME_SIZE]; |
| 75 | |
| 76 | get_soc_name(name); |
| 77 | printf("CPU: %s\n", name); |
| 78 | |
| 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | int arch_misc_init(void) |
| 83 | { |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | /* |
| 88 | * Force data-section, as .bss will not be valid |
| 89 | * when save_boot_params is invoked. |
| 90 | */ |
| 91 | static uintptr_t nt_fw_dtb __section(".data"); |
| 92 | |
| 93 | uintptr_t get_stm32mp_bl2_dtb(void) |
| 94 | { |
| 95 | return nt_fw_dtb; |
| 96 | } |
| 97 | |
| 98 | /* |
| 99 | * Save the FDT address provided by TF-A in r2 at boot time |
| 100 | * This function is called from start.S |
| 101 | */ |
| 102 | void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2, |
| 103 | unsigned long r3) |
| 104 | { |
| 105 | nt_fw_dtb = r2; |
| 106 | |
| 107 | save_boot_params_ret(); |
| 108 | } |