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Wolfgang Denk07ad17c2006-02-22 00:43:16 +01001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5200
33#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
34#define CONFIG_MCC200 1 /* ... on MCC200 board */
35
36#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
37
38#define CONFIG_MISC_INIT_R
39
40#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
41#define BOOTFLAG_WARM 0x02 /* Software reboot */
42
43#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
46#endif
47
48/*
49 * Serial console configuration
50 */
51#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
52#define CONFIG_BAUDRATE 115200
53#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
54
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010055#define CONFIG_MII 1
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010056
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010057#define CONFIG_DOS_PARTITION
58
59/* USB */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010060#define CONFIG_USB_OHCI
61#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
62#define CONFIG_USB_STORAGE
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010063
64/*
65 * Supported commands
66 */
67#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010068 ADD_USB_CMD | \
69 CFG_CMD_BEDBUG | \
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010070 CFG_CMD_FAT | \
Wolfgang Denk2de83b62006-03-21 01:58:07 +010071 CFG_CMD_I2C)
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010072
73/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
74#include <cmd_confdefs.h>
75
76/*
77 * Autobooting
78 */
79#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
80
81#define CONFIG_PREBOOT "echo;" \
82 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
83 "echo"
84
85#undef CONFIG_BOOTARGS
86
87#define CONFIG_EXTRA_ENV_SETTINGS \
88 "netdev=eth0\0" \
Stefan Roese254a3d02006-02-28 15:33:28 +010089 "hostname=mcc200\0" \
Wolfgang Denk07ad17c2006-02-22 00:43:16 +010090 "nfsargs=setenv bootargs root=/dev/nfs rw " \
91 "nfsroot=${serverip}:${rootpath}\0" \
92 "ramargs=setenv bootargs root=/dev/ram rw\0" \
93 "addip=setenv bootargs ${bootargs} " \
94 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
95 ":${hostname}:${netdev}:off panic=1\0" \
96 "flash_nfs=run nfsargs addip;" \
97 "bootm ${kernel_addr}\0" \
98 "flash_self=run ramargs addip;" \
99 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
100 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
Wolfgang Denk8256a8f2006-02-28 18:39:20 +0100101 "rootpath=/opt/eldk/ppc_6xx\0" \
Stefan Roese254a3d02006-02-28 15:33:28 +0100102 "bootfile=/tftpboot/mcc200/uImage\0" \
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100103 "baudrate=115200\0" \
Wolfgang Denk8256a8f2006-02-28 18:39:20 +0100104 "load=tftp 200000 /tftpboot/mcc200/u-boot.bin\0" \
105 "update=protect off FFF00000 +${filesize};" \
106 "era FFF00000 +${filesize};" \
107 "cp.b 200000 FFF00000 ${filesize}\0" \
Stefan Roese254a3d02006-02-28 15:33:28 +0100108 "serverip=192.168.1.1\0" \
109 "ipaddr=192.168.133.144\0" \
110 "netmask=255.255.0.0\0" \
111 "unlock=yes\0" \
Wolfgang Denk8256a8f2006-02-28 18:39:20 +0100112 "ethaddr=00:02:44:7D:73:3B\0" \
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100113 ""
114
115#define CONFIG_BOOTCOMMAND "run flash_self"
116
Wolfgang Denk8256a8f2006-02-28 18:39:20 +0100117#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
118#define CFG_PROMPT_HUSH_PS2 "> "
119
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100120/*
121 * IPB Bus clocking configuration.
122 */
Wolfgang Denk8256a8f2006-02-28 18:39:20 +0100123#define CFG_IPBSPEED_133 /* define for 133MHz speed */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100124
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100125/*
126 * I2C configuration
127 */
128#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Wolfgang Denk2de83b62006-03-21 01:58:07 +0100129#define CFG_I2C_MODULE 1 /* Select I2C module #1 or #2 */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100130
131#define CFG_I2C_SPEED 100000 /* 100 kHz */
132#define CFG_I2C_SLAVE 0x7F
133
134/*
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100135 * Flash configuration (8,16 or 32 MB)
136 * TEXT base always at 0xFFF00000
137 * ENV_ADDR always at 0xFFF40000
Stefan Roese254a3d02006-02-28 15:33:28 +0100138 * FLASH_BASE at 0xFC000000 for 64 MB (only 32MB are supported, not enough addr lines!!!)
139 * 0xFE000000 for 32 MB
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100140 * 0xFF000000 for 16 MB
141 * 0xFF800000 for 8 MB
142 */
Stefan Roese254a3d02006-02-28 15:33:28 +0100143#define CFG_FLASH_BASE 0xfc000000
144#define CFG_FLASH_SIZE 0x04000000
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100145
Stefan Roese254a3d02006-02-28 15:33:28 +0100146#define CFG_FLASH_CFI /* The flash is CFI compatible */
147#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100148
Stefan Roese254a3d02006-02-28 15:33:28 +0100149#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100150
Stefan Roese254a3d02006-02-28 15:33:28 +0100151#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
152#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100153
Stefan Roese254a3d02006-02-28 15:33:28 +0100154#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
155#define CFG_FLASH_PROTECTION 1 /* hardware flash protection */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100156
Stefan Roese254a3d02006-02-28 15:33:28 +0100157#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
158#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100159
Stefan Roese254a3d02006-02-28 15:33:28 +0100160#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
161#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
162
163#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
164
165#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
166#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
167#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
168
169/* Address and size of Redundant Environment Sector */
170#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
171#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
172
173#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100174
175/*
176 * Memory map
177 */
178#define CFG_MBAR 0xf0000000
179#define CFG_SDRAM_BASE 0x00000000
180#define CFG_DEFAULT_MBAR 0x80000000
181
182/* Use SRAM until RAM will be available */
183#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
184#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
185
186
187#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
188#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
189#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
190
191#define CFG_MONITOR_BASE TEXT_BASE
192#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
193# define CFG_RAMBOOT 1
194#endif
195
196#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
Stefan Roese254a3d02006-02-28 15:33:28 +0100197#define CFG_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100198#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
199
200/*
201 * Ethernet configuration
202 */
203#define CONFIG_MPC5xxx_FEC 1
204/*
205 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
206 */
207/* #define CONFIG_FEC_10MBIT 1 */
Stefan Roese254a3d02006-02-28 15:33:28 +0100208#define CONFIG_PHY_ADDR 1
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100209
210/*
211 * GPIO configuration
212 */
Wolfgang Denk67777b92006-03-06 13:03:37 +0100213/* 0x10000004 = 32MB SDRAM */
214/* 0x90000004 = 64MB SDRAM */
Wolfgang Denk2de83b62006-03-21 01:58:07 +0100215#define CFG_GPS_PORT_CONFIG 0x00000004
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100216
217/*
218 * Miscellaneous configurable options
219 */
220#define CFG_LONGHELP /* undef to save memory */
221#define CFG_PROMPT "=> " /* Monitor Command Prompt */
222#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
223#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
224#else
225#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
226#endif
227#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
228#define CFG_MAXARGS 16 /* max number of command args */
229#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
230
231#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
232#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
233
234#define CFG_LOAD_ADDR 0x100000 /* default load address */
235
236#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
237
238/*
239 * Various low-level settings
240 */
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100241#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
242#define CFG_HID0_FINAL HID0_ICE
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100243
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100244#define CFG_BOOTCS_START CFG_FLASH_BASE
245#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
246#define CFG_BOOTCS_CFG 0x0004fb00
247#define CFG_CS0_START CFG_FLASH_BASE
248#define CFG_CS0_SIZE CFG_FLASH_SIZE
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100249
Wolfgang Denke18f9432006-03-23 17:10:30 +0100250/* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */
251#define CFG_CS2_START 0x80000000
252#define CFG_CS2_SIZE 0x00001000
Wolfgang Denkd2497132006-04-13 16:35:22 +0200253#define CFG_CS2_CFG 0x1d300
Wolfgang Denke18f9432006-03-23 17:10:30 +0100254
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100255#define CFG_CS_BURST 0x00000000
256#define CFG_CS_DEADCYCLE 0x33333333
257
258#define CFG_RESET_ADDRESS 0xff000000
259
260/*-----------------------------------------------------------------------
261 * USB stuff
262 *-----------------------------------------------------------------------
263 */
264#define CONFIG_USB_CLOCK 0x0001BBBB
265#define CONFIG_USB_CONFIG 0x00005000
266
Wolfgang Denk07ad17c2006-02-22 00:43:16 +0100267#endif /* __CONFIG_H */