blob: 74b21985f581767c26efd8b84ee072e496b88339 [file] [log] [blame]
Simon Glass791f61b2012-12-03 13:56:51 +00001/dts-v1/;
2
Stephen Warren3f972cc2013-07-24 10:09:20 -07003/include/ "coreboot.dtsi"
Simon Glass791f61b2012-12-03 13:56:51 +00004
5/ {
Wolfgang Denkec7fbf52013-10-04 17:43:24 +02006 #address-cells = <1>;
7 #size-cells = <1>;
Simon Glass791f61b2012-12-03 13:56:51 +00008 model = "Google Link";
9 compatible = "google,link", "intel,celeron-ivybridge";
10
11 config {
12 silent_console = <0>;
13 };
14
Simon Glass1fad1462014-10-10 07:49:19 -060015 gpioa {
16 compatible = "intel,ich6-gpio";
Simon Glass9a447682014-11-12 22:42:25 -070017 u-boot,dm-pre-reloc;
Simon Glass1fad1462014-10-10 07:49:19 -060018 reg = <0 0x10>;
19 bank-name = "A";
20 };
21
22 gpiob {
23 compatible = "intel,ich6-gpio";
Simon Glass9a447682014-11-12 22:42:25 -070024 u-boot,dm-pre-reloc;
Simon Glass1fad1462014-10-10 07:49:19 -060025 reg = <0x30 0x10>;
26 bank-name = "B";
27 };
28
29 gpioc {
30 compatible = "intel,ich6-gpio";
Simon Glass9a447682014-11-12 22:42:25 -070031 u-boot,dm-pre-reloc;
Simon Glass1fad1462014-10-10 07:49:19 -060032 reg = <0x40 0x10>;
33 bank-name = "C";
34 };
Simon Glass791f61b2012-12-03 13:56:51 +000035
36 serial {
37 reg = <0x3f8 8>;
38 clock-frequency = <115200>;
39 };
40
Wolfgang Denkec7fbf52013-10-04 17:43:24 +020041 chosen { };
42 memory { device_type = "memory"; reg = <0 0>; };
Simon Glass87323ed2013-03-11 06:08:10 +000043
44 spi {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "intel,ich9";
48 spi-flash@0 {
49 reg = <0>;
50 compatible = "winbond,w25q64", "spi-flash";
51 memory-map = <0xff800000 0x00800000>;
52 };
53 };
Simon Glasse4e56272014-10-10 07:30:13 -060054
55 lpc {
56 compatible = "intel,lpc";
57 #address-cells = <1>;
58 #size-cells = <1>;
Simon Glassdcfac352014-11-12 22:42:15 -070059 gen-dec = <0x800 0xfc 0x900 0xfc>;
Simon Glasse4e56272014-10-10 07:30:13 -060060 cros-ec@200 {
61 compatible = "google,cros-ec";
62 reg = <0x204 1 0x200 1 0x880 0x80>;
63
64 /* This describes the flash memory within the EC */
65 #address-cells = <1>;
66 #size-cells = <1>;
67 flash@8000000 {
68 reg = <0x08000000 0x20000>;
69 erase-value = <0xff>;
70 };
71 };
72 };
Simon Glass0c84eec2014-11-12 22:42:22 -070073
74 microcode {
75 update@0 {
76#include "m12206a7_00000028.dtsi"
77 };
78 update@1 {
79#include "m12306a9_00000017.dtsi"
80 };
81 };
82
Simon Glass791f61b2012-12-03 13:56:51 +000083};