blob: d2490e6063dd4657ca3dff4feedd5613b355072b [file] [log] [blame]
Tim Harvey256dba02021-03-02 14:00:21 -08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2021 Gateworks Corporation
4 */
5
6#include <common.h>
7#include <command.h>
8#include <hang.h>
9#include <hexdump.h>
10#include <i2c.h>
11#include <linux/delay.h>
12#include <dm/uclass.h>
13
14#include "gsc.h"
15
16DECLARE_GLOBAL_DATA_PTR;
17
18struct venice_board_info som_info;
19struct venice_board_info base_info;
20char venice_model[32];
21
22/* return a mac address from EEPROM info */
23int gsc_getmac(int index, uint8_t *address)
24{
25 int i, j;
26 u32 maclow, machigh;
27 u64 mac;
28
29 j = 0;
30 if (som_info.macno) {
31 maclow = som_info.mac[5];
32 maclow |= som_info.mac[4] << 8;
33 maclow |= som_info.mac[3] << 16;
34 maclow |= som_info.mac[2] << 24;
35 machigh = som_info.mac[1];
36 machigh |= som_info.mac[0] << 8;
37 mac = machigh;
38 mac <<= 32;
39 mac |= maclow;
40 for (i = 0; i < som_info.macno; i++, j++) {
41 if (index == j)
42 goto out;
43 }
44 }
45
46 maclow = base_info.mac[5];
47 maclow |= base_info.mac[4] << 8;
48 maclow |= base_info.mac[3] << 16;
49 maclow |= base_info.mac[2] << 24;
50 machigh = base_info.mac[1];
51 machigh |= base_info.mac[0] << 8;
52 mac = machigh;
53 mac <<= 32;
54 mac |= maclow;
55 for (i = 0; i < base_info.macno; i++, j++) {
56 if (index == j)
57 goto out;
58 }
59
60 return -EINVAL;
61
62out:
63 mac += i;
64 address[0] = (mac >> 40) & 0xff;
65 address[1] = (mac >> 32) & 0xff;
66 address[2] = (mac >> 24) & 0xff;
67 address[3] = (mac >> 16) & 0xff;
68 address[4] = (mac >> 8) & 0xff;
69 address[5] = (mac >> 0) & 0xff;
70
71 return 0;
72}
73
74/* System Controller registers */
75enum {
76 GSC_SC_CTRL0 = 0,
77 GSC_SC_CTRL1 = 1,
78 GSC_SC_STATUS = 10,
79 GSC_SC_FWCRC = 12,
80 GSC_SC_FWVER = 14,
81 GSC_SC_WP = 15,
82 GSC_SC_RST_CAUSE = 16,
83 GSC_SC_THERM_PROTECT = 19,
84};
85
86/* System Controller Control1 bits */
87enum {
88 GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
89 GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
90 GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */
91 GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
92};
93
94/* System Controller Interrupt bits */
95enum {
96 GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
97 GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
98 GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
99 GSC_SC_IRQ_GPIO = 4, /* GPIO change */
100 GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
101 GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
102 GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
103};
104
105/* System Controller WP bits */
106enum {
107 GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */
108 GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */
109};
110
111/* System Controller Reset Cause */
112enum {
113 GSC_SC_RST_CAUSE_VIN = 0,
114 GSC_SC_RST_CAUSE_PB = 1,
115 GSC_SC_RST_CAUSE_WDT = 2,
116 GSC_SC_RST_CAUSE_CPU = 3,
117 GSC_SC_RST_CAUSE_TEMP_LOCAL = 4,
118 GSC_SC_RST_CAUSE_TEMP_REMOTE = 5,
119 GSC_SC_RST_CAUSE_SLEEP = 6,
120 GSC_SC_RST_CAUSE_BOOT_WDT = 7,
121 GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8,
122 GSC_SC_RST_CAUSE_SOFT_PWR = 9,
123 GSC_SC_RST_CAUSE_MAX = 10,
124};
125
126static struct udevice *gsc_get_dev(int busno, int slave)
127{
Tim Harvey7ae30ce2021-03-08 13:52:35 -0800128 static const char * const i2c[] = { "i2c@30a20000", "i2c@30a30000" };
129 struct udevice *dev, *bus;
Tim Harvey256dba02021-03-02 14:00:21 -0800130 int ret;
131
Tim Harvey7ae30ce2021-03-08 13:52:35 -0800132 ret = uclass_get_device_by_name(UCLASS_I2C, i2c[busno - 1], &bus);
Tim Harvey256dba02021-03-02 14:00:21 -0800133 if (ret) {
Tim Harvey7ae30ce2021-03-08 13:52:35 -0800134 printf("GSC : failed I2C%d probe: %d\n", busno, ret);
Tim Harvey256dba02021-03-02 14:00:21 -0800135 return NULL;
136 }
Tim Harvey7ae30ce2021-03-08 13:52:35 -0800137 ret = dm_i2c_probe(bus, slave, 0, &dev);
138 if (ret)
Tim Harvey256dba02021-03-02 14:00:21 -0800139 return NULL;
Tim Harvey256dba02021-03-02 14:00:21 -0800140
141 return dev;
142}
143
144static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
145{
146 int i;
147 int chksum;
148 unsigned char *buf = (unsigned char *)info;
149 struct udevice *dev;
150 int ret;
151
152 /* probe device */
153 dev = gsc_get_dev(bus, slave);
154 if (!dev) {
155 if (slave == GSC_EEPROM_ADDR)
156 puts("ERROR: Failed to probe EEPROM\n");
157 return -ENODEV;
158 }
159
160 /* read eeprom config section */
161 memset(info, 0, sizeof(*info));
162 ret = i2c_set_chip_offset_len(dev, alen);
163 if (ret) {
164 puts("EEPROM: Failed to set alen\n");
165 return ret;
166 }
167 ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
168 if (ret) {
169 if (slave == GSC_EEPROM_ADDR)
170 printf("EEPROM: Failed to read EEPROM\n");
171 return ret;
172 }
173
174 /* validate checksum */
175 for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
176 chksum += buf[i];
177 if ((info->chksum[0] != chksum >> 8) ||
178 (info->chksum[1] != (chksum & 0xff))) {
179 printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
180 print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
181 memset(info, 0, sizeof(*info));
182 return -EINVAL;
183 }
184
185 /* sanity check valid model */
186 if (info->model[0] != 'G' || info->model[1] != 'W') {
187 printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
188 print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
189 memset(info, 0, sizeof(*info));
190 return -EINVAL;
191 }
192
193 return 0;
194}
195
196static const char *gsc_get_rst_cause(struct udevice *dev)
197{
198 static char str[64];
199 static const char * const names[] = {
200 "VIN",
201 "PB",
202 "WDT",
203 "CPU",
204 "TEMP_L",
205 "TEMP_R",
206 "SLEEP",
207 "BOOT_WDT1",
208 "BOOT_WDT2",
209 "SOFT_PWR",
210 };
211 unsigned char reg;
212
213 /* reset cause */
214 str[0] = 0;
215 if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, &reg, 1)) {
216 if (reg < ARRAY_SIZE(names))
217 sprintf(str, "%s", names[reg]);
218 else
219 sprintf(str, "0x%02x", reg);
220 }
221
222 /* thermal protection */
223 if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, &reg, 1)) {
224 reg |= 1;
225 dm_i2c_write(dev, GSC_SC_THERM_PROTECT, &reg, 1);
226 strcat(str, " Thermal Protection Enabled");
227 }
228
229 return str;
230}
231
232/* display hardware monitor ADC channels */
233int gsc_hwmon(void)
234{
235 const void *fdt = gd->fdt_blob;
236 struct udevice *dev;
237 int node, reg, mode, len, val, offset;
238 const char *label;
239 u8 buf[2];
240 int ret;
241
242 node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
243 if (node <= 0)
244 return node;
245
246 /* probe device */
247 dev = gsc_get_dev(1, GSC_HWMON_ADDR);
248 if (!dev) {
249 puts("ERROR: Failed to probe GSC HWMON\n");
250 return -ENODEV;
251 }
252
253 /* iterate over hwmon nodes */
254 node = fdt_first_subnode(fdt, node);
255 while (node > 0) {
256 reg = fdtdec_get_int(fdt, node, "reg", -1);
257 mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
258 offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
259 label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
260
261 if ((reg == -1) || (mode == -1) || !label)
262 printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
263
264 memset(buf, 0, sizeof(buf));
265 ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
266 if (ret) {
267 printf("i2c error: %d\n", ret);
268 continue;
269 }
270 val = buf[0] | buf[1] << 8;
271 if (val >= 0) {
272 const u32 *div;
273 int r[2];
274
275 switch (mode) {
276 case 0: /* temperature (C*10) */
277 if (val > 0x8000)
278 val -= 0xffff;
279 printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
280 break;
281 case 1: /* prescaled voltage */
282 if (val != 0xffff)
283 printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
284 break;
285 case 2: /* scaled based on ref volt and resolution */
286 val *= 2500;
287 val /= 1 << 12;
288
289 /* apply pre-scaler voltage divider */
290 div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
291 if (div && (len == sizeof(uint32_t) * 2)) {
292 r[0] = fdt32_to_cpu(div[0]);
293 r[1] = fdt32_to_cpu(div[1]);
294 if (r[0] && r[1]) {
295 val *= (r[0] + r[1]);
296 val /= r[1];
297 }
298 }
299
300 /* adjust by offset */
301 val += offset;
302
303 printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
304 break;
305 }
306 }
307 node = fdt_next_subnode(fdt, node);
308 }
309
310 return 0;
311}
312
313/* determine BOM revision from model */
314int get_bom_rev(const char *str)
315{
316 int rev_bom = 0;
317 int i;
318
319 for (i = strlen(str) - 1; i > 0; i--) {
320 if (str[i] == '-')
321 break;
322 if (str[i] >= '1' && str[i] <= '9') {
323 rev_bom = str[i] - '0';
324 break;
325 }
326 }
327 return rev_bom;
328}
329
330/* determine PCB revision from model */
331char get_pcb_rev(const char *str)
332{
333 char rev_pcb = 'A';
334 int i;
335
336 for (i = strlen(str) - 1; i > 0; i--) {
337 if (str[i] == '-')
338 break;
339 if (str[i] >= 'A') {
340 rev_pcb = str[i];
341 break;
342 }
343 }
344 return rev_pcb;
345}
346
347/*
348 * get dt name based on model and detail level:
349 *
350 * For boards that are a combination of a SoM plus a Baseboard:
351 * Venice SoM part numbers are GW70xx where xx is:
352 * 7000-7019: same PCB with som dt of '0x'
353 * 7020-7039: same PCB with som dt of '2x'
354 * 7040-7059: same PCB with som dt of '4x'
355 * 7060-7079: same PCB with som dt of '6x'
356 * 7080-7099: same PCB with som dt of '8x'
357 * Venice Baseboard part numbers are GW7xxx where xxx is:
358 * 7100-7199: same PCB with base dt of '71xx'
359 * 7200-7299: same PCB with base dt of '72xx'
360 * 7300-7399: same PCB with base dt of '73xx'
361 * 7400-7499: same PCB with base dt of '74xx'
362 * 7500-7599: same PCB with base dt of '75xx'
363 * 7600-7699: same PCB with base dt of '76xx'
364 * 7700-7799: same PCB with base dt of '77xx'
365 * 7800-7899: same PCB with base dt of '78xx'
366 * DT name is comprised of:
367 * gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
368 *
369 * For board models from 7900-7999 each PCB is unique with its own dt:
370 * DT name is comprised:
371 * gw<model>-[pcb-rev][bom-rev]
372 *
373 */
374#define snprintfcat(dest, sz, fmt, ...) \
375 snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
376const char *gsc_get_dtb_name(int level, char *buf, int sz)
377{
378 const char *pre = "imx8mm-venice-gw";
379 int model, rev_pcb, rev_bom;
380
381 model = ((som_info.model[2] - '0') * 1000)
382 + ((som_info.model[3] - '0') * 100)
383 + ((som_info.model[4] - '0') * 10)
384 + (som_info.model[5] - '0');
385 rev_pcb = tolower(get_pcb_rev(som_info.model));
386 rev_bom = get_bom_rev(som_info.model);
387
388 /* som + baseboard*/
389 if (base_info.model[0]) {
390 /* baseboard id: 7100-7199->71; 7200-7299->72; etc */
391 int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
392 /* som id: 7000-7019->1; 7020-7039->2; etc */
393 int som = ((model % 100) / 20) * 2;
394 int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
395 int rev_base_bom = get_bom_rev(base_info.model);
396
397 snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
398 switch (level) {
399 case 0: /* full model (ie gw73xx-0x-a1a1) */
400 if (rev_base_bom)
401 snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
402 else
403 snprintfcat(buf, sz, "-%c", rev_base_pcb);
404 if (rev_bom)
405 snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
406 else
407 snprintfcat(buf, sz, "%c", rev_pcb);
408 break;
409 case 1: /* don't care about SoM revision */
410 if (rev_base_bom)
411 snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
412 else
413 snprintfcat(buf, sz, "-%c", rev_base_pcb);
414 snprintfcat(buf, sz, "xx");
415 break;
416 case 2: /* don't care about baseboard revision */
417 snprintfcat(buf, sz, "-xx");
418 if (rev_bom)
419 snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
420 else
421 snprintfcat(buf, sz, "%c", rev_pcb);
422 break;
423 case 3: /* don't care about SoM/baseboard revision */
424 break;
425 default:
426 return NULL;
427 }
428 } else {
429 snprintf(buf, sz, "%s%04d", pre, model);
430 switch (level) {
431 case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
432 if (rev_bom)
433 snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
434 else
435 snprintfcat(buf, sz, "-%c", rev_pcb);
436 break;
437 case 1: /* don't care about BOM revision */
438 snprintfcat(buf, sz, "-%c", rev_pcb);
439 break;
440 case 2: /* don't care about PCB or BOM revision */
441 break;
442 default:
443 return NULL;
444 }
445 }
446
447 return buf;
448}
449
450static int gsc_read(void)
451{
452 int ret;
453
454 ret = gsc_read_eeprom(1, GSC_EEPROM_ADDR, 1, &som_info);
455 if (ret) {
456 memset(&som_info, 0, sizeof(som_info));
457 return ret;
458 }
459
460 /* read optional baseboard EEPROM */
461 return gsc_read_eeprom(2, 0x52, 2, &base_info);
462}
463
464static int gsc_info(int verbose)
465{
466 struct udevice *dev;
467 unsigned char buf[16];
468 char rev_pcb;
469 int rev_bom;
470
471 if (!base_info.model[0]) {
472 strcpy(venice_model, som_info.model);
473 printf("Model : %s\n", som_info.model);
474 printf("Serial : %d\n", som_info.serial);
475 printf("MFGDate : %02x-%02x-%02x%02x\n",
476 som_info.mfgdate[0], som_info.mfgdate[1],
477 som_info.mfgdate[2], som_info.mfgdate[3]);
478 } else {
479 sprintf(venice_model, "GW%c%c%c%c-%c%c-",
480 som_info.model[2], /* family */
481 base_info.model[3], /* baseboard */
482 base_info.model[4], base_info.model[5], /* subload of baseboard */
483 som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
484
485 /* baseboard revision */
486 rev_pcb = get_pcb_rev(base_info.model);
487 rev_bom = get_bom_rev(base_info.model);
488 if (rev_bom)
489 sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
490 else
491 sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
492 /* som revision */
493 rev_pcb = get_pcb_rev(som_info.model);
494 rev_bom = get_bom_rev(som_info.model);
495 if (rev_bom)
496 sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
497 else
498 sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
499
500 if (verbose > 1) {
501 printf("SOM : %s %d %02x-%02x-%02x%02x\n",
502 som_info.model, som_info.serial,
503 som_info.mfgdate[0], som_info.mfgdate[1],
504 som_info.mfgdate[2], som_info.mfgdate[3]);
505 printf("BASE : %s %d %02x-%02x-%02x%02x\n",
506 base_info.model, base_info.serial,
507 base_info.mfgdate[0], base_info.mfgdate[1],
508 base_info.mfgdate[2], base_info.mfgdate[3]);
509 }
510 printf("Model : %s\n", venice_model);
511 printf("Serial : %d\n", som_info.serial);
512 printf("MFGDate : %02x-%02x-%02x%02x\n",
513 som_info.mfgdate[0], som_info.mfgdate[1],
514 som_info.mfgdate[2], som_info.mfgdate[3]);
515 }
516
517 /* Display RTC */
518 puts("RTC : ");
519 dev = gsc_get_dev(1, GSC_RTC_ADDR);
520 if (!dev) {
521 puts("Failed to probe GSC RTC\n");
522 } else {
523 dm_i2c_read(dev, 0, buf, 6);
524 printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
525 }
526
527 return 0;
528}
529
530int gsc_init(int quiet)
531{
532 unsigned char buf[16];
533 struct udevice *dev;
534 int ret;
535
536 /*
537 * On a board with a missing/depleted backup battery for GSC, the
538 * board may be ready to probe the GSC before its firmware is
539 * running. We will wait here indefinately for the GSC/EEPROM.
540 */
541 while (1) {
542 /* probe device */
543 dev = gsc_get_dev(1, GSC_SC_ADDR);
544 if (dev)
545 break;
546 mdelay(1);
547 }
548
549 ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
550 if (ret) {
551 puts("ERROR: Failed reading GSC\n");
552 return ret;
553 }
554 gsc_read();
555
556 /* banner */
557 if (!quiet) {
558 printf("GSC : v%d 0x%04x", buf[GSC_SC_FWVER],
559 buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
560 printf(" RST:%s", gsc_get_rst_cause(dev));
561 printf("\n");
562 gsc_info(1);
563 }
564
565 if (ret)
566 hang();
567
568 return ((16 << som_info.sdram_size) / 1024);
569}
570
571const char *gsc_get_model(void)
572{
573 return venice_model;
574}
575
576#if !(IS_ENABLED(CONFIG_SPL_BUILD))
577static int gsc_sleep(unsigned long secs)
578{
579 unsigned char reg;
580 struct udevice *dev;
581 int ret;
582
583 /* probe device */
584 dev = gsc_get_dev(1, GSC_SC_ADDR);
585 if (!dev)
586 return -ENODEV;
587
588 printf("GSC Sleeping for %ld seconds\n", secs);
589 reg = (secs >> 24) & 0xff;
590 ret = dm_i2c_write(dev, 9, &reg, 1);
591 if (ret)
592 goto err;
593 reg = (secs >> 16) & 0xff;
594 ret = dm_i2c_write(dev, 8, &reg, 1);
595 if (ret)
596 goto err;
597 reg = (secs >> 8) & 0xff;
598 ret = dm_i2c_write(dev, 7, &reg, 1);
599 if (ret)
600 goto err;
601 reg = secs & 0xff;
602 ret = dm_i2c_write(dev, 6, &reg, 1);
603 if (ret)
604 goto err;
605 ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
606 if (ret)
607 goto err;
608 reg |= (1 << 2);
609 ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
610 if (ret)
611 goto err;
612 reg &= ~(1 << 2);
613 reg |= 0x3;
614 ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
615 if (ret)
616 goto err;
617
618 return 0;
619
620err:
621 printf("i2c error\n");
622 return ret;
623}
624
625static int gsc_boot_wd_disable(void)
626{
627 u8 reg;
628 struct udevice *dev;
629 int ret;
630
631 /* probe device */
632 dev = gsc_get_dev(1, GSC_SC_ADDR);
633 if (!dev)
634 return -ENODEV;
635
636 ret = dm_i2c_read(dev, GSC_SC_CTRL1, &reg, 1);
637 if (ret)
638 goto err;
639 reg |= (1 << GSC_SC_CTRL1_WDDIS);
640 reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
641 ret = dm_i2c_write(dev, GSC_SC_CTRL1, &reg, 1);
642 if (ret)
643 goto err;
644 puts("GSC : boot watchdog disabled\n");
645
646 return 0;
647
648err:
649 printf("i2c error");
650 return ret;
651}
652
653static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
654{
655 if (argc < 2)
656 return gsc_info(2);
657
658 if (strcasecmp(argv[1], "sleep") == 0) {
659 if (argc < 3)
660 return CMD_RET_USAGE;
661 if (!gsc_sleep(simple_strtoul(argv[2], NULL, 10)))
662 return CMD_RET_SUCCESS;
663 } else if (strcasecmp(argv[1], "hwmon") == 0) {
664 if (!gsc_hwmon())
665 return CMD_RET_SUCCESS;
666 } else if (strcasecmp(argv[1], "wd-disable") == 0) {
667 if (!gsc_boot_wd_disable())
668 return CMD_RET_SUCCESS;
669 }
670
671 return CMD_RET_USAGE;
672}
673
674U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
675 "[sleep <secs>]|[hwmon]|[wd-disable]\n");
676#endif