Chin Liang See | 6355024 | 2014-06-10 01:17:42 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Altera Corporation <www.altera.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/freeze_controller.h> |
| 10 | #include <asm/arch/scan_manager.h> |
| 11 | |
| 12 | DECLARE_GLOBAL_DATA_PTR; |
| 13 | |
| 14 | static const struct socfpga_scan_manager *scan_manager_base = |
| 15 | (void *)(SOCFPGA_SCANMGR_ADDRESS); |
| 16 | static const struct socfpga_freeze_controller *freeze_controller_base = |
| 17 | (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS); |
| 18 | |
| 19 | /* |
| 20 | * Function to check IO scan chain engine status and wait if the engine is |
| 21 | * is active. Poll the IO scan chain engine till maximum iteration reached. |
| 22 | */ |
| 23 | static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter) |
| 24 | { |
| 25 | uint32_t scanmgr_status; |
| 26 | |
| 27 | scanmgr_status = readl(&scan_manager_base->stat); |
| 28 | |
| 29 | /* Poll the engine until the scan engine is inactive */ |
| 30 | while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) || |
| 31 | (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) > 0)) { |
| 32 | max_iter--; |
| 33 | if (max_iter > 0) |
| 34 | scanmgr_status = readl(&scan_manager_base->stat); |
| 35 | else |
| 36 | return 0; |
| 37 | } |
| 38 | return 1; |
| 39 | } |
| 40 | |
| 41 | /* Program HPS IO Scan Chain */ |
| 42 | uint32_t scan_mgr_io_scan_chain_prg( |
| 43 | uint32_t io_scan_chain_id, |
| 44 | uint32_t io_scan_chain_len_in_bits, |
| 45 | const uint32_t *iocsr_scan_chain) |
| 46 | { |
| 47 | uint16_t tdi_tdo_header; |
| 48 | uint32_t io_program_iter; |
| 49 | uint32_t io_scan_chain_data_residual; |
| 50 | uint32_t residual; |
| 51 | uint32_t i; |
| 52 | uint32_t index = 0; |
| 53 | |
| 54 | /* |
| 55 | * De-assert reinit if the IO scan chain is intended for HIO. In |
| 56 | * this, its the chain 3. |
| 57 | */ |
| 58 | if (io_scan_chain_id == 3) |
| 59 | clrbits_le32(&freeze_controller_base->hioctrl, |
| 60 | SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK); |
| 61 | |
| 62 | /* |
| 63 | * Check if the scan chain engine is inactive and the |
| 64 | * WFIFO is empty before enabling the IO scan chain |
| 65 | */ |
| 66 | if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY)) |
| 67 | return 1; |
| 68 | |
| 69 | /* |
| 70 | * Enable IO Scan chain based on scan chain id |
| 71 | * Note: only one chain can be enabled at a time |
| 72 | */ |
| 73 | setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); |
| 74 | |
| 75 | /* |
| 76 | * Calculate number of iteration needed for full 128-bit (4 x32-bits) |
| 77 | * bits shifting. Each TDI_TDO packet can shift in maximum 128-bits |
| 78 | */ |
| 79 | io_program_iter = io_scan_chain_len_in_bits >> |
| 80 | IO_SCAN_CHAIN_128BIT_SHIFT; |
| 81 | io_scan_chain_data_residual = io_scan_chain_len_in_bits & |
| 82 | IO_SCAN_CHAIN_128BIT_MASK; |
| 83 | |
| 84 | /* Construct TDI_TDO packet for 128-bit IO scan chain (2 bytes) */ |
| 85 | tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE | |
| 86 | (TDI_TDO_MAX_PAYLOAD << TDI_TDO_HEADER_SECOND_BYTE_SHIFT); |
| 87 | |
| 88 | /* Program IO scan chain in 128-bit iteration */ |
| 89 | for (i = 0; i < io_program_iter; i++) { |
| 90 | /* write TDI_TDO packet header to scan manager */ |
| 91 | writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte); |
| 92 | |
| 93 | /* calculate array index. Multiply by 4 as write 4 x 32bits */ |
| 94 | index = i * 4; |
| 95 | |
| 96 | /* write 4 successive 32-bit IO scan chain data into WFIFO */ |
| 97 | writel(iocsr_scan_chain[index], |
| 98 | &scan_manager_base->fifo_quad_byte); |
| 99 | writel(iocsr_scan_chain[index + 1], |
| 100 | &scan_manager_base->fifo_quad_byte); |
| 101 | writel(iocsr_scan_chain[index + 2], |
| 102 | &scan_manager_base->fifo_quad_byte); |
| 103 | writel(iocsr_scan_chain[index + 3], |
| 104 | &scan_manager_base->fifo_quad_byte); |
| 105 | |
| 106 | /* |
| 107 | * Check if the scan chain engine has completed the |
| 108 | * IO scan chain data shifting |
| 109 | */ |
| 110 | if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY)) |
| 111 | goto error; |
| 112 | } |
| 113 | |
| 114 | /* Calculate array index for final TDI_TDO packet */ |
| 115 | index = io_program_iter * 4; |
| 116 | |
| 117 | /* Final TDI_TDO packet if any */ |
| 118 | if (io_scan_chain_data_residual) { |
| 119 | /* |
| 120 | * Calculate number of quad bytes FIFO write |
| 121 | * needed for the final TDI_TDO packet |
| 122 | */ |
| 123 | io_program_iter = io_scan_chain_data_residual >> |
| 124 | IO_SCAN_CHAIN_32BIT_SHIFT; |
| 125 | |
| 126 | /* |
| 127 | * Construct TDI_TDO packet for remaining IO |
| 128 | * scan chain (2 bytes) |
| 129 | */ |
| 130 | tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE | |
| 131 | ((io_scan_chain_data_residual - 1) << |
| 132 | TDI_TDO_HEADER_SECOND_BYTE_SHIFT); |
| 133 | |
| 134 | /* |
| 135 | * Program the last part of IO scan chain write TDI_TDO packet |
| 136 | * header (2 bytes) to scan manager |
| 137 | */ |
| 138 | writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte); |
| 139 | |
| 140 | for (i = 0; i < io_program_iter; i++) { |
| 141 | /* |
| 142 | * write remaining scan chain data into scan |
| 143 | * manager WFIFO with 4 bytes write |
| 144 | */ |
| 145 | writel(iocsr_scan_chain[index + i], |
| 146 | &scan_manager_base->fifo_quad_byte); |
| 147 | } |
| 148 | |
| 149 | index += io_program_iter; |
| 150 | residual = io_scan_chain_data_residual & |
| 151 | IO_SCAN_CHAIN_32BIT_MASK; |
| 152 | |
| 153 | if (IO_SCAN_CHAIN_PAYLOAD_24BIT < residual) { |
| 154 | /* |
| 155 | * write the last 4B scan chain data |
| 156 | * into scan manager WFIFO |
| 157 | */ |
| 158 | writel(iocsr_scan_chain[index], |
| 159 | &scan_manager_base->fifo_quad_byte); |
| 160 | } else { |
| 161 | /* |
| 162 | * write the remaining 1 - 3 bytes scan chain |
| 163 | * data into scan manager WFIFO byte by byte |
| 164 | * to prevent JTAG engine shifting unused data |
| 165 | * from the FIFO and mistaken the data as a |
| 166 | * valid command (even though unused bits are |
| 167 | * set to 0, but just to prevent hardware |
| 168 | * glitch) |
| 169 | */ |
| 170 | for (i = 0; i < residual; i += 8) { |
| 171 | writel(((iocsr_scan_chain[index] >> i) |
| 172 | & IO_SCAN_CHAIN_BYTE_MASK), |
| 173 | &scan_manager_base->fifo_single_byte); |
| 174 | } |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * Check if the scan chain engine has completed the |
| 179 | * IO scan chain data shifting |
| 180 | */ |
| 181 | if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY)) |
| 182 | goto error; |
| 183 | } |
| 184 | |
| 185 | /* Disable IO Scan chain when configuration done*/ |
| 186 | clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); |
| 187 | return 0; |
| 188 | |
| 189 | error: |
| 190 | /* Disable IO Scan chain when error detected */ |
| 191 | clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id); |
| 192 | return 1; |
| 193 | } |
| 194 | |
| 195 | int scan_mgr_configure_iocsr(void) |
| 196 | { |
| 197 | int status = 0; |
| 198 | |
| 199 | /* configure the IOCSR through scan chain */ |
| 200 | status |= scan_mgr_io_scan_chain_prg(0, |
| 201 | CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH, iocsr_scan_chain0_table); |
| 202 | status |= scan_mgr_io_scan_chain_prg(1, |
| 203 | CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH, iocsr_scan_chain1_table); |
| 204 | status |= scan_mgr_io_scan_chain_prg(2, |
| 205 | CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH, iocsr_scan_chain2_table); |
| 206 | status |= scan_mgr_io_scan_chain_prg(3, |
| 207 | CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH, iocsr_scan_chain3_table); |
| 208 | return status; |
| 209 | } |