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Peter Griffin31f327e2015-07-30 18:55:23 +01001/*
2 * (C) Copyright 2015 Linaro
3 *
4 * Peter Griffin <peter.griffin@linaro.org>
5 *
6 * Configuration for HiKey 96boards CE. Parts were derived from other ARM
7 * configurations.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __HIKEY_H
13#define __HIKEY_H
14
Peter Griffin6719baa2015-09-10 21:55:13 +010015#include <linux/sizes.h>
16
Peter Griffin31f327e2015-07-30 18:55:23 +010017#define CONFIG_POWER
18#define CONFIG_POWER_HI6553
19
20#define CONFIG_REMAKE_ELF
21
22#define CONFIG_SUPPORT_RAW_INITRD
23
Peter Griffin31f327e2015-07-30 18:55:23 +010024/* Physical Memory Map */
25
26/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */
27#define CONFIG_SYS_TEXT_BASE 0x35000000
28
Peter Griffin9967fd02016-04-20 17:14:02 +010029#define CONFIG_NR_DRAM_BANKS 6
Peter Griffin31f327e2015-07-30 18:55:23 +010030#define PHYS_SDRAM_1 0x00000000
31
32/* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/
Peter Griffin7de4acf2015-09-10 21:55:18 +010033#define PHYS_SDRAM_1_SIZE 0x3EFFFFFF
34
Peter Griffin31f327e2015-07-30 18:55:23 +010035#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
36
37#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
38
39#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
40
41#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000)
42
43/* Generic Timer Definitions */
44#define COUNTER_FREQUENCY 19000000
45
46/* Generic Interrupt Controller Definitions */
47#define GICD_BASE 0xf6801000
48#define GICC_BASE 0xf6802000
49
50/* Size of malloc() pool */
Peter Griffin6719baa2015-09-10 21:55:13 +010051#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
Peter Griffin31f327e2015-07-30 18:55:23 +010052
Peter Griffin0382c642015-09-10 21:55:17 +010053/* Serial port PL010/PL011 through the device model */
54#define CONFIG_PL01X_SERIAL
Peter Griffin31f327e2015-07-30 18:55:23 +010055
Peter Griffin31f327e2015-07-30 18:55:23 +010056#ifdef CONFIG_CMD_USB
Peter Griffin31f327e2015-07-30 18:55:23 +010057#define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000
58/*#define CONFIG_DWC2_DFLT_SPEED_FULL*/
59#define CONFIG_DWC2_ENABLE_DYNAMIC_FIFO
60
Peter Griffin31f327e2015-07-30 18:55:23 +010061#define CONFIG_MISC_INIT_R
62#endif
63
64#define CONFIG_HIKEY_GPIO
Peter Griffin31f327e2015-07-30 18:55:23 +010065
66/* SD/MMC configuration */
Peter Griffin31f327e2015-07-30 18:55:23 +010067#define CONFIG_BOUNCE_BUFFER
Peter Griffin31f327e2015-07-30 18:55:23 +010068
69#define CONFIG_FS_EXT4
70
71/* Command line configuration */
Peter Griffin31f327e2015-07-30 18:55:23 +010072
73#define CONFIG_MTD_PARTITIONS
74
75/* BOOTP options */
76#define CONFIG_BOOTP_BOOTFILESIZE
77
78#include <config_distro_defaults.h>
79
80/* Initial environment variables */
81
82/*
83 * Defines where the kernel and FDT will be put in RAM
84 */
85
Peter Griffin31f327e2015-07-30 18:55:23 +010086#define BOOT_TARGET_DEVICES(func) \
87 func(USB, usb, 0) \
88 func(MMC, mmc, 1) \
89 func(DHCP, dhcp, na)
90#include <config_distro_bootcmd.h>
91
92#define CONFIG_EXTRA_ENV_SETTINGS \
93 "kernel_name=Image\0" \
94 "kernel_addr_r=0x00080000\0" \
Alexander Grafaf684802016-03-04 01:10:11 +010095 "fdtfile=hi6220-hikey.dtb\0" \
Peter Griffin31f327e2015-07-30 18:55:23 +010096 "fdt_addr_r=0x02000000\0" \
97 "fdt_high=0xffffffffffffffff\0" \
98 "initrd_high=0xffffffffffffffff\0" \
99 BOOTENV
100
Robert P. J. Day8c60f922016-05-04 04:47:31 -0400101/* Preserve environment on sd card */
Peter Griffin31f327e2015-07-30 18:55:23 +0100102#define CONFIG_ENV_SIZE 0x1000
Peter Griffin31f327e2015-07-30 18:55:23 +0100103#define CONFIG_ENV_VARS_UBOOT_CONFIG
104
105/* Monitor Command Prompt */
106#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Peter Griffin31f327e2015-07-30 18:55:23 +0100107#define CONFIG_SYS_LONGHELP
108#define CONFIG_CMDLINE_EDITING
109#define CONFIG_SYS_MAXARGS 64 /* max command args */
110
Peter Griffin31f327e2015-07-30 18:55:23 +0100111#endif /* __HIKEY_H */