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Christian Gmeiner5ad7c162014-10-02 13:33:46 +02001/*
2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include "mx6_common.h"
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020012
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020013/* Size of malloc() pool */
14#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
15
16#define CONFIG_BOARD_EARLY_INIT_F
17#define CONFIG_MISC_INIT_R
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020018
19/* FUSE Configs */
20#define CONFIG_CMD_FUSE
21#define CONFIG_MXC_OCOTP
22
23/* UART Configs */
24#define CONFIG_MXC_UART
25#define CONFIG_MXC_UART_BASE UART1_BASE
26
27/* SF Configs */
28#define CONFIG_CMD_SF
29#define CONFIG_SPI
30#define CONFIG_SPI_FLASH
31#define CONFIG_SPI_FLASH_STMICRO
32#define CONFIG_SPI_FLASH_WINBOND
33#define CONFIG_SPI_FLASH_MACRONIX
34#define CONFIG_SPI_FLASH_SST
35#define CONFIG_MXC_SPI
36#define CONFIG_SF_DEFAULT_BUS 2
Christian Gmeiner477b5322014-10-22 11:29:51 +020037#define CONFIG_SF_DEFAULT_CS 0
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020038#define CONFIG_SF_DEFAULT_SPEED 25000000
39#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
40
41/* IO expander */
42#define CONFIG_PCA953X
43#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
44#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
45#define CONFIG_CMD_PCA953X
46#define CONFIG_CMD_PCA953X_INFO
47
48/* I2C Configs */
49#define CONFIG_CMD_I2C
50#define CONFIG_SYS_I2C
51#define CONFIG_SYS_I2C_MXC
York Sunf1a52162015-03-20 10:20:40 -070052#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020053#define CONFIG_SYS_I2C_SPEED 100000
54
55/* OCOTP Configs */
56#define CONFIG_CMD_IMXOTP
57#define CONFIG_IMX_OTP
58#define IMX_OTP_BASE OCOTP_BASE_ADDR
59#define IMX_OTP_ADDR_MAX 0x7F
60#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
61#define IMX_OTPWRITE_ENABLED
62
63/* MMC Configs */
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020064#define CONFIG_SYS_FSL_ESDHC_ADDR 0
65#define CONFIG_SYS_FSL_USDHC_NUM 2
66
Christian Gmeinerb2a03fd2014-11-10 14:35:48 +010067/* USB Configs */
68#define CONFIG_CMD_USB
Christian Gmeiner8d845d52014-12-04 09:56:32 +010069#define CONFIG_USB_STORAGE
Christian Gmeinerb2a03fd2014-11-10 14:35:48 +010070#define CONFIG_USB_EHCI
71#define CONFIG_USB_EHCI_MX6
72#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
73#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
74
Christian Gmeiner5ad7c162014-10-02 13:33:46 +020075#ifdef CONFIG_MX6Q
76#define CONFIG_CMD_SATA
77#endif
78
79/*
80 * SATA Configs
81 */
82#ifdef CONFIG_CMD_SATA
83#define CONFIG_DWC_AHSATA
84#define CONFIG_SYS_SATA_MAX_DEVICE 1
85#define CONFIG_DWC_AHSATA_PORT_ID 0
86#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
87#define CONFIG_LBA48
88#define CONFIG_LIBATA
89#endif
90
91
Christian Gmeinerd8e33c42015-01-19 17:26:48 +010092/* SPL */
93#ifdef CONFIG_SPL
94#include "imx6_spl.h"
95#define CONFIG_SPL_SPI_SUPPORT
96#define CONFIG_SPL_LIBCOMMON_SUPPORT
97#define CONFIG_SPL_SPI_FLASH_SUPPORT
98#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
99#define CONFIG_SPL_SPI_LOAD
100#endif
101
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200102#define CONFIG_CMD_PING
103#define CONFIG_CMD_DHCP
104#define CONFIG_CMD_MII
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200105#define CONFIG_FEC_MXC
106#define CONFIG_MII
107#define IMX_FEC_BASE ENET_BASE_ADDR
108#define CONFIG_FEC_XCV_TYPE MII100
109#define CONFIG_ETHPRIME "FEC"
110#define CONFIG_FEC_MXC_PHYADDR 0x5
111#define CONFIG_PHYLIB
112#define CONFIG_PHY_SMSC
113
Christian Gmeinerf2a73992015-02-11 15:20:25 +0100114#ifndef CONFIG_SPL
115#define CONFIG_CMD_EEPROM
116#define CONFIG_ENV_EEPROM_IS_ON_I2C
117#define CONFIG_SYS_I2C_EEPROM_BUS 1
118#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
119#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
120#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
121#define CONFIG_SYS_I2C_MULTI_EEPROMS
122#endif
123
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200124/* Miscellaneous commands */
125#define CONFIG_CMD_BMODE
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200126
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200127#define CONFIG_PREBOOT ""
128
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200129/* Print Buffer Size */
130#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200131
132/* Physical Memory Map */
133#define CONFIG_NR_DRAM_BANKS 1
134#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200135
136#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
137#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
138#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
139
140#define CONFIG_SYS_INIT_SP_OFFSET \
141 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
142#define CONFIG_SYS_INIT_SP_ADDR \
143 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
144
Peter Robinson4b671502015-05-22 17:30:45 +0100145/* Environment organization */
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200146#define CONFIG_ENV_IS_IN_SPI_FLASH
147#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
148#define CONFIG_ENV_OFFSET (1024 * 1024)
149/* M25P16 has an erase size of 64 KiB */
150#define CONFIG_ENV_SECT_SIZE (64 * 1024)
151#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
152#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
153#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
154#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
155
Christian Gmeiner5ad7c162014-10-02 13:33:46 +0200156#define CONFIG_BOOTP_SERVERIP
157#define CONFIG_BOOTP_BOOTFILE
158
159#endif /* __CONFIG_H */