Chris Morgan | 8c4e304 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | |
| 3 | #include "rk356x-u-boot.dtsi" |
| 4 | |
| 5 | / { |
| 6 | chosen { |
| 7 | stdout-path = &uart2; |
| 8 | u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0; |
| 9 | }; |
| 10 | |
| 11 | rng: rng@fe388000 { |
| 12 | compatible = "rockchip,cryptov2-rng"; |
| 13 | reg = <0x0 0xfe388000 0x0 0x2000>; |
| 14 | status = "okay"; |
| 15 | }; |
| 16 | }; |
| 17 | |
| 18 | &cru { |
| 19 | assigned-clocks = |
| 20 | <&pmucru CLK_RTC_32K>, |
| 21 | <&pmucru PLL_PPLL>, |
| 22 | <&pmucru PCLK_PMU>, <&cru PLL_CPLL>, |
| 23 | <&cru PLL_GPLL>, |
| 24 | <&cru ACLK_BUS>, <&cru PCLK_BUS>, |
| 25 | <&cru ACLK_TOP_HIGH>, <&cru ACLK_TOP_LOW>, |
| 26 | <&cru HCLK_TOP>, <&cru PCLK_TOP>, |
| 27 | <&cru ACLK_PERIMID>, <&cru HCLK_PERIMID>, |
| 28 | <&cru CPLL_500M>, <&cru CPLL_333M>, |
| 29 | <&cru CPLL_250M>, <&cru CPLL_125M>, |
| 30 | <&cru CPLL_100M>, <&cru CPLL_62P5M>, |
| 31 | <&cru CPLL_50M>, <&cru CPLL_25M>; |
| 32 | assigned-clock-rates = |
| 33 | <32768>, |
| 34 | <200000000>, |
| 35 | <100000000>, <1000000000>, |
| 36 | <1188000000>, |
| 37 | <150000000>, <100000000>, |
| 38 | <500000000>, <400000000>, |
| 39 | <150000000>, <100000000>, |
| 40 | <300000000>, <150000000>, |
| 41 | <500000000>, <333333333>, |
| 42 | <250000000>, <125000000>, |
| 43 | <100000000>, <62500000>, |
| 44 | <50000000>, <25000000>; |
| 45 | assigned-clock-parents = |
| 46 | <&pmucru CLK_RTC32K_FRAC>; |
| 47 | }; |
| 48 | |
Chris Morgan | a1deb13 | 2023-05-15 11:00:28 -0500 | [diff] [blame] | 49 | &dsi_dphy0 { |
| 50 | status = "okay"; |
| 51 | }; |
| 52 | |
| 53 | &dsi0 { |
| 54 | status = "okay"; |
| 55 | }; |
| 56 | |
Chris Morgan | 8c4e304 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 57 | &i2c2 { |
Chris Morgan | b1f3222 | 2023-05-15 11:00:27 -0500 | [diff] [blame] | 58 | pinctrl-0 = <&i2c2m1_xfer>; |
| 59 | pinctrl-names = "default"; |
Chris Morgan | 8c4e304 | 2023-04-21 10:59:19 -0500 | [diff] [blame] | 60 | status = "okay"; |
| 61 | }; |
| 62 | |
| 63 | &pmucru { |
| 64 | assigned-clocks = <&pmucru SCLK_32K_IOE>; |
| 65 | assigned-clock-parents = <&pmucru CLK_RTC_32K>; |
| 66 | }; |
| 67 | |
| 68 | /* |
| 69 | * We don't need the clocks, but if they are present they may cause |
| 70 | * probing to fail so we remove them for U-Boot. |
| 71 | */ |
| 72 | &rk817 { |
| 73 | /delete-property/ assigned-clocks; |
| 74 | /delete-property/ assigned-clock-parents; |
| 75 | /delete-property/ clocks; |
| 76 | /delete-property/ clock-names; |
| 77 | }; |
| 78 | |
| 79 | &sdhci { |
| 80 | pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, |
| 81 | <&emmc_datastrobe>, <&emmc_rstnout>; |
| 82 | pinctrl-names = "default"; |
| 83 | bus-width = <8>; |
| 84 | max-frequency = <200000000>; |
| 85 | mmc-hs200-1_8v; |
| 86 | non-removable; |
| 87 | vmmc-supply = <&vcc_3v3>; |
| 88 | vqmmc-supply = <&vcc_1v8>; |
| 89 | status = "okay"; |
| 90 | }; |
| 91 | |
| 92 | &uart2 { |
| 93 | clock-frequency = <24000000>; |
| 94 | bootph-all; |
| 95 | status = "okay"; |
| 96 | }; |