blob: d365d0f2cea628cc1f32954fb42f21ae4a73aeac [file] [log] [blame]
Philippe Reynesd1406612018-07-16 19:06:14 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
4 */
5
6#include "skeleton.dtsi"
7
8/ {
9 compatible = "brcm,bcm6838";
10
11 cpus {
12 reg = <0x14e00000 0x4>;
13 #address-cells = <1>;
14 #size-cells = <0>;
15 u-boot,dm-pre-reloc;
16
17 cpu@0 {
18 compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
19 device_type = "cpu";
20 reg = <0>;
21 u-boot,dm-pre-reloc;
22 };
23
24 cpu@1 {
25 compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
26 device_type = "cpu";
27 reg = <1>;
28 u-boot,dm-pre-reloc;
29 };
30 };
31
32 clocks {
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 u-boot,dm-pre-reloc;
37
38 periph_osc: periph-osc {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <50000000>;
42 u-boot,dm-pre-reloc;
43 };
44 };
45
46 ubus {
47 compatible = "simple-bus";
48 #address-cells = <1>;
49 #size-cells = <1>;
50 u-boot,dm-pre-reloc;
51
52 memory: memory-controller@12000000 {
53 compatible = "brcm,bcm6328-mc";
54 reg = <0x12000000 0x1000>;
55 u-boot,dm-pre-reloc;
56 };
57
58 uart0: serial@14e00500 {
59 compatible = "brcm,bcm6345-uart";
60 reg = <0x14e00500 0x18>;
61 clocks = <&periph_osc>;
62
63 status = "disabled";
64 };
65
66 leds: led-controller@14e00f00 {
67 compatible = "brcm,bcm6328-leds";
68 reg = <0x14e00f00 0x28>;
69 #address-cells = <1>;
70 #size-cells = <0>;
71
72 status = "disabled";
73 };
74 };
75};