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huang lin1115b642015-11-17 14:20:27 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#ifndef __CONFIG_RK3036_COMMON_H
7#define __CONFIG_RK3036_COMMON_H
8
9#include <asm/arch/hardware.h>
Jacob Chen63dc9712016-10-08 13:47:41 +080010#include "rockchip-common.h"
huang lin1115b642015-11-17 14:20:27 +080011
huang lin1115b642015-11-17 14:20:27 +080012#define CONFIG_NR_DRAM_BANKS 1
13#define CONFIG_ENV_IS_NOWHERE
14#define CONFIG_ENV_SIZE 0x2000
15#define CONFIG_SYS_MAXARGS 16
16#define CONFIG_BAUDRATE 115200
17#define CONFIG_SYS_MALLOC_LEN (32 << 20)
18#define CONFIG_SYS_CBSIZE 1024
19#define CONFIG_SKIP_LOWLEVEL_INIT
20#define CONFIG_SYS_THUMB_BUILD
huang lin1115b642015-11-17 14:20:27 +080021
22#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
23#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */
24#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
25
26#define CONFIG_SYS_NS16550
27#define CONFIG_SYS_NS16550_MEM32
28
huang lin1115b642015-11-17 14:20:27 +080029#define CONFIG_SYS_TEXT_BASE 0x60000000
30#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
31#define CONFIG_SYS_LOAD_ADDR 0x60800800
32#define CONFIG_SPL_STACK 0x10081fff
33#define CONFIG_SPL_TEXT_BASE 0x10081004
34
35#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10)
36#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
37
huang lin1115b642015-11-17 14:20:27 +080038/* MMC/SD IP block */
huang lin1115b642015-11-17 14:20:27 +080039#define CONFIG_BOUNCE_BUFFER
40
huang lin1115b642015-11-17 14:20:27 +080041#define CONFIG_FAT_WRITE
huang lin1115b642015-11-17 14:20:27 +080042
huang lin1115b642015-11-17 14:20:27 +080043#define CONFIG_SYS_SDRAM_BASE 0x60000000
44#define CONFIG_NR_DRAM_BANKS 1
45#define SDRAM_BANK_SIZE (512UL << 20UL)
46
47#define CONFIG_SPI_FLASH
48#define CONFIG_SPI
huang lin1115b642015-11-17 14:20:27 +080049#define CONFIG_SPI_FLASH_GIGADEVICE
50#define CONFIG_SF_DEFAULT_SPEED 20000000
51
huang lin1115b642015-11-17 14:20:27 +080052#ifndef CONFIG_SPL_BUILD
Xu Ziyuane71ce522016-07-28 11:42:34 +080053/* usb otg */
54#define CONFIG_USB_GADGET
55#define CONFIG_USB_GADGET_DUALSPEED
56#define CONFIG_USB_GADGET_DWC2_OTG
57#define CONFIG_USB_GADGET_VBUS_DRAW 0
58
59/* fastboot */
60#define CONFIG_CMD_FASTBOOT
61#define CONFIG_USB_FUNCTION_FASTBOOT
62#define CONFIG_FASTBOOT_FLASH
63#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
64#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
65#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
66
jacob2.chen4d393482016-08-30 01:26:14 +080067/* usb mass storage */
68#define CONFIG_USB_FUNCTION_MASS_STORAGE
69#define CONFIG_CMD_USB_MASS_STORAGE
70
Xu Ziyuane71ce522016-07-28 11:42:34 +080071#define CONFIG_USB_GADGET_DOWNLOAD
72#define CONFIG_G_DNL_MANUFACTURER "Rockchip"
73#define CONFIG_G_DNL_VENDOR_NUM 0x2207
74#define CONFIG_G_DNL_PRODUCT_NUM 0x310a
75
Kever Yang096af312016-11-08 18:13:39 +080076/* usb host */
77#ifdef CONFIG_CMD_USB
78#define CONFIG_USB_DWC2
79#define CONFIG_USB_HOST_ETHER
80#define CONFIG_USB_ETHER_SMSC95XX
81#define CONFIG_USB_ETHER_ASIX
82#endif
huang lin1115b642015-11-17 14:20:27 +080083#define ENV_MEM_LAYOUT_SETTINGS \
84 "scriptaddr=0x60000000\0" \
85 "pxefile_addr_r=0x60100000\0" \
86 "fdt_addr_r=0x61f00000\0" \
87 "kernel_addr_r=0x62000000\0" \
88 "ramdisk_addr_r=0x64000000\0"
89
huang lin1115b642015-11-17 14:20:27 +080090#include <config_distro_bootcmd.h>
91
92/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
93 * so limit the fdt reallocation to that */
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "fdt_high=0x7fffffff\0" \
Jacob Chene5152912016-09-19 18:46:25 +080096 "partitions=" PARTS_DEFAULT \
huang lin1115b642015-11-17 14:20:27 +080097 ENV_MEM_LAYOUT_SETTINGS \
98 BOOTENV
99#endif
100
Jacob Chenc95f3782016-09-19 18:46:28 +0800101#define CONFIG_PREBOOT
102
huang lin1115b642015-11-17 14:20:27 +0800103#endif