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Daniel Gorsulowski6f196d52009-06-30 21:03:37 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +01006 * (C) Copyright 2009-2015
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +02007 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8 * esd electronic system design gmbh <www.esd.eu>
9 *
10 * Configuation settings for the esd MEESC board.
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000018/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
23
24/*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010030#define CONFIG_SYS_TEXT_BASE 0x21F00000
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000031
32/* ARM asynchronous clock */
33#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
Daniel Gorsulowski847726c2010-08-09 11:17:13 +020034#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020035
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000036/* Misc CPU related */
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020037#define CONFIG_SKIP_LOWLEVEL_INIT
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000038#define CONFIG_ARCH_CPU_INIT
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000039#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
41#define CONFIG_SERIAL_TAG
42#define CONFIG_REVISION_TAG
43#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Daniel Gorsulowski88e57172010-01-20 08:00:11 +010044#define CONFIG_MISC_INIT_R /* Call misc_init_r */
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020045
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000046#define CONFIG_PREBOOT /* enable preboot variable */
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020047
48/*
49 * Hardware drivers
50 */
51
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000052/* general purpose I/O */
53#define CONFIG_AT91_GPIO
54
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020055/* Console output */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000056#define CONFIG_ATMEL_USART
57#define CONFIG_USART_BASE ATMEL_BASE_DBGU
58#define CONFIG_USART_ID ATMEL_ID_SYS
59#define CONFIG_BAUDRATE 115200
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020060
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020061/*
62 * BOOTP options
63 */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000064#define CONFIG_BOOTP_BOOTFILESIZE
65#define CONFIG_BOOTP_BOOTPATH
66#define CONFIG_BOOTP_GATEWAY
67#define CONFIG_BOOTP_HOSTNAME
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020068
69/*
70 * Command line configuration.
71 */
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010072
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010073#ifdef CONFIG_SYS_USE_NANDFLASH
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000074#define CONFIG_CMD_NAND
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010075#endif
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020076
77/* LED */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000078#define CONFIG_AT91_LED
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +020079
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000080/*
81 * SDRAM: 1 bank, min 32, max 128 MB
82 * Initialized before u-boot gets started.
83 */
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010084#define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */
85#define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */
86
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000087#define CONFIG_NR_DRAM_BANKS 1
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +010088#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
89#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +000090
91#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
92#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
93#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
94
95/*
96 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
97 * leaving the correct space for initial global data structure above
98 * that address while providing maximum stack area below.
99 */
100#define CONFIG_SYS_INIT_SP_ADDR \
101 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200102
103/* DataFlash */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000104#ifdef CONFIG_SYS_USE_DATAFLASH
105# define CONFIG_ATMEL_DATAFLASH_SPI
106# define CONFIG_HAS_DATAFLASH
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000107# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
108# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
109# define AT91_SPI_CLK 15000000
110# define DATAFLASH_TCSS (0x1a << 16)
111# define DATAFLASH_TCHS (0x1 << 24)
112#endif
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200113
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200114/* NAND flash */
115#ifdef CONFIG_CMD_NAND
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000116# define CONFIG_NAND_ATMEL
117# define CONFIG_SYS_MAX_NAND_DEVICE 1
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +0100118# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000119# define CONFIG_SYS_NAND_DBW_8
120# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
121# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmanna4c24d32013-11-29 12:13:45 +0100122# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
123# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200124#endif
125
126/* Ethernet */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000127#define CONFIG_MACB
128#define CONFIG_RMII
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200129#define CONFIG_NET_RETRY_COUNT 20
130#undef CONFIG_RESET_PHY_R
131
Daniel Gorsulowski54b531a2009-09-29 08:03:12 +0200132/* hw-controller addresses */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000133#define CONFIG_ET1100_BASE 0x70000000
134
135#ifdef CONFIG_SYS_USE_DATAFLASH
Daniel Gorsulowski54b531a2009-09-29 08:03:12 +0200136
137/* bootstrap + u-boot + env in dataflash on CS0 */
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000138# define CONFIG_ENV_IS_IN_DATAFLASH
139# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200140 0x8400)
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000141# define CONFIG_ENV_OFFSET 0x4200
142# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200143 CONFIG_ENV_OFFSET)
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000144# define CONFIG_ENV_SIZE 0x4200
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200145
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000146#elif CONFIG_SYS_USE_NANDFLASH
147
148/* bootstrap + u-boot + env + linux in nandflash */
149# define CONFIG_ENV_IS_IN_NAND 1
150# define CONFIG_ENV_OFFSET 0xC0000
151# define CONFIG_ENV_SIZE 0x20000
152
153#endif
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200154
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000155#define CONFIG_SYS_CBSIZE 512
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200156#define CONFIG_SYS_MAXARGS 16
157#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
158 sizeof(CONFIG_SYS_PROMPT) + 16)
Matthias Fuchs2d56c2b2011-07-19 01:56:06 +0000159#define CONFIG_SYS_LONGHELP
160#define CONFIG_CMDLINE_EDITING
Daniel Gorsulowski2acb23b2015-11-02 07:59:49 +0100161#define CONFIG_AUTO_COMPLETE
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200162
163/*
164 * Size of malloc() pool
165 */
Daniel Gorsulowski54b531a2009-09-29 08:03:12 +0200166#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
167 128*1024, 0x1000)
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200168
Daniel Gorsulowski6f196d52009-06-30 21:03:37 +0200169#endif