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Wu, Josh3f338c12013-04-16 23:42:44 +00001/*
2 * (C) Copyright 2013 Atmel Corporation.
3 * Josh Wu <josh.wu@atmel.com>
4 *
5 * Configuation settings for the AT91SAM9N12-EK boards.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Wu, Josh3f338c12013-04-16 23:42:44 +00008 */
9
10#ifndef __AT91SAM9N12_CONFIG_H_
11#define __AT91SAM9N12_CONFIG_H_
12
13/*
14 * SoC must be defined first, before hardware.h is included.
15 * In this case SoC is defined in boards.cfg.
16 */
17#include <asm/hardware.h>
18
19#define CONFIG_SYS_TEXT_BASE 0x26f00000
20
Wu, Josh3f338c12013-04-16 23:42:44 +000021/* ARM asynchronous clock */
22#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
23#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
Wu, Josh3f338c12013-04-16 23:42:44 +000024
25/* Misc CPU related */
26#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
29#define CONFIG_SKIP_LOWLEVEL_INIT
Wu, Josh3f338c12013-04-16 23:42:44 +000030
Wu, Josh3f338c12013-04-16 23:42:44 +000031/* general purpose I/O */
32#define CONFIG_AT91_GPIO
33
34/* serial console */
35#define CONFIG_ATMEL_USART
36#define CONFIG_USART_BASE ATMEL_BASE_DBGU
37#define CONFIG_USART_ID ATMEL_ID_SYS
38#define CONFIG_BAUDRATE 115200
39
40/* LCD */
Wu, Josh3f338c12013-04-16 23:42:44 +000041#define LCD_BPP LCD_COLOR16
42#define LCD_OUTPUT_BPP 24
43#define CONFIG_LCD_LOGO
44#define CONFIG_LCD_INFO
45#define CONFIG_LCD_INFO_BELOW_LOGO
46#define CONFIG_SYS_WHITE_ON_BLACK
47#define CONFIG_ATMEL_HLCD
48#define CONFIG_ATMEL_LCD_RGB565
Wu, Josh3f338c12013-04-16 23:42:44 +000049
Wu, Josh3f338c12013-04-16 23:42:44 +000050
51/*
52 * BOOTP options
53 */
54#define CONFIG_BOOTP_BOOTFILESIZE
55#define CONFIG_BOOTP_BOOTPATH
56#define CONFIG_BOOTP_GATEWAY
57#define CONFIG_BOOTP_HOSTNAME
58
Wu, Josh3f338c12013-04-16 23:42:44 +000059/*
60 * Command line configuration.
61 */
Wu, Josh3f338c12013-04-16 23:42:44 +000062#define CONFIG_CMD_NAND
Wu, Josh3f338c12013-04-16 23:42:44 +000063
64#define CONFIG_NR_DRAM_BANKS 1
65#define CONFIG_SYS_SDRAM_BASE 0x20000000
66#define CONFIG_SYS_SDRAM_SIZE 0x08000000
67
68/*
69 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
70 * leaving the correct space for initial global data structure above
71 * that address while providing maximum stack area below.
72 */
73# define CONFIG_SYS_INIT_SP_ADDR \
74 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
75
76/* DataFlash */
77#ifdef CONFIG_CMD_SF
78#define CONFIG_ATMEL_SPI
Wu, Josh3f338c12013-04-16 23:42:44 +000079#define CONFIG_SF_DEFAULT_SPEED 30000000
80#define CONFIG_ENV_SPI_MODE SPI_MODE_3
81#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
82#endif
83
84/* NAND flash */
85#ifdef CONFIG_CMD_NAND
86#define CONFIG_NAND_ATMEL
87#define CONFIG_SYS_MAX_NAND_DEVICE 1
88#define CONFIG_SYS_NAND_BASE 0x40000000
89#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
90#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010091#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
92#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
Wu, Josh3f338c12013-04-16 23:42:44 +000093
94/* PMECC & PMERRLOC */
95#define CONFIG_ATMEL_NAND_HWECC
96#define CONFIG_ATMEL_NAND_HW_PMECC
97#define CONFIG_PMECC_CAP 2
98#define CONFIG_PMECC_SECTOR_SIZE 512
99#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
Bo Shen591ef582013-06-26 10:48:53 +0800100
101#define CONFIG_CMD_NAND_TRIMFFS
102
Wu, Josh3f338c12013-04-16 23:42:44 +0000103#endif
104
105#define CONFIG_MTD_PARTITIONS
106#define CONFIG_MTD_DEVICE
107#define CONFIG_CMD_MTDPARTS
108#define MTDIDS_DEFAULT "nand0=atmel_nand"
109#define MTDPARTS_DEFAULT \
110 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
111 "256k(env),256k(env_redundant),256k(spare)," \
112 "512k(dtb),6M(kernel)ro,-(rootfs)"
113
114#define CONFIG_EXTRA_ENV_SETTINGS \
115 "console=console=ttyS0,115200\0" \
116 "mtdparts="MTDPARTS_DEFAULT"\0" \
117 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
118 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
119
120/* MMC */
121#ifdef CONFIG_CMD_MMC
Wu, Josh3f338c12013-04-16 23:42:44 +0000122#define CONFIG_GENERIC_ATMEL_MCI
123#endif
124
Bo Shend2c26122013-04-24 10:46:18 +0800125/* Ethernet */
126#define CONFIG_KS8851_MLL
127#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
128
Wu, Josh3f338c12013-04-16 23:42:44 +0000129#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
130
131#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
132#define CONFIG_SYS_MEMTEST_END 0x26e00000
133
Bo Shen8ed87832013-10-21 16:13:59 +0800134/* USB host */
135#ifdef CONFIG_CMD_USB
136#define CONFIG_USB_ATMEL
Bo Shen4a985df2013-10-21 16:14:00 +0800137#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Bo Shen8ed87832013-10-21 16:13:59 +0800138#define CONFIG_USB_OHCI_NEW
139#define CONFIG_SYS_USB_OHCI_CPU_INIT
140#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
141#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
142#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Bo Shen8ed87832013-10-21 16:13:59 +0800143#endif
144
Wu, Josh3f338c12013-04-16 23:42:44 +0000145#ifdef CONFIG_SYS_USE_SPIFLASH
146
147/* bootstrap + u-boot + env + linux in dataflash on CS0 */
148#define CONFIG_ENV_IS_IN_SPI_FLASH
149#define CONFIG_ENV_OFFSET 0x5000
150#define CONFIG_ENV_SIZE 0x3000
151#define CONFIG_ENV_SECT_SIZE 0x1000
152#define CONFIG_BOOTCOMMAND \
153 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
154 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
155 "bootm 0x22000000"
156
157#elif defined(CONFIG_SYS_USE_NANDFLASH)
158
159/* bootstrap + u-boot + env + linux in nandflash */
160#define CONFIG_ENV_IS_IN_NAND
161#define CONFIG_ENV_OFFSET 0xc0000
162#define CONFIG_ENV_OFFSET_REDUND 0x100000
163#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
164#define CONFIG_BOOTCOMMAND \
165 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
166 "nand read 0x21000000 0x180000 0x080000;" \
167 "nand read 0x22000000 0x200000 0x400000;" \
168 "bootm 0x22000000 - 0x21000000"
169
170#else /* CONFIG_SYS_USE_MMC */
171
172/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh32abdfe2015-03-24 17:07:22 +0800173
174#ifdef CONFIG_ENV_IS_IN_MMC
175/* Use raw reserved sectors to save environment */
Wu, Josh3f338c12013-04-16 23:42:44 +0000176#define CONFIG_ENV_OFFSET 0x2000
177#define CONFIG_ENV_SIZE 0x1000
178#define CONFIG_SYS_MMC_ENV_DEV 0
Wu, Josh32abdfe2015-03-24 17:07:22 +0800179#else
180/* Use file in FAT file to save environment */
181#define CONFIG_ENV_IS_IN_FAT
182#define CONFIG_FAT_WRITE
183#define FAT_ENV_INTERFACE "mmc"
184#define FAT_ENV_FILE "uboot.env"
185#define FAT_ENV_DEVICE_AND_PART "0"
186#define CONFIG_ENV_SIZE 0x4000
187#endif
188
Wu, Josh3f338c12013-04-16 23:42:44 +0000189#define CONFIG_BOOTCOMMAND \
190 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
191 "fatload mmc 0:1 0x21000000 dtb;" \
192 "fatload mmc 0:1 0x22000000 uImage;" \
193 "bootm 0x22000000 - 0x21000000"
194
195#endif
196
Wu, Josh3f338c12013-04-16 23:42:44 +0000197#define CONFIG_SYS_CBSIZE 256
198#define CONFIG_SYS_MAXARGS 16
Wu, Josh3f338c12013-04-16 23:42:44 +0000199#define CONFIG_SYS_LONGHELP
200#define CONFIG_CMDLINE_EDITING
201#define CONFIG_AUTO_COMPLETE
Wu, Josh3f338c12013-04-16 23:42:44 +0000202
203/*
204 * Size of malloc() pool
205 */
206#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
Bo Shen9c709392015-03-27 14:23:36 +0800207
208/* SPL */
209#define CONFIG_SPL_FRAMEWORK
210#define CONFIG_SPL_TEXT_BASE 0x300000
211#define CONFIG_SPL_MAX_SIZE 0x6000
212#define CONFIG_SPL_STACK 0x308000
213
214#define CONFIG_SPL_BSS_START_ADDR 0x20000000
215#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
216#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
217#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
218
Bo Shen9c709392015-03-27 14:23:36 +0800219#define CONFIG_SPL_BOARD_INIT
220#define CONFIG_SYS_MONITOR_LEN (512 << 10)
221
222#define CONFIG_SYS_MASTER_CLOCK 132096000
223#define CONFIG_SYS_AT91_PLLA 0x20953f03
224#define CONFIG_SYS_MCKR 0x1301
225#define CONFIG_SYS_MCKR_CSS 0x1302
226
Bo Shen9c709392015-03-27 14:23:36 +0800227#ifdef CONFIG_SYS_USE_MMC
228#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shen9c709392015-03-27 14:23:36 +0800229#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
230#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shen9c709392015-03-27 14:23:36 +0800231
232#elif CONFIG_SYS_USE_NANDFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800233#define CONFIG_SPL_NAND_DRIVERS
234#define CONFIG_SPL_NAND_BASE
235#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
236#define CONFIG_SYS_NAND_5_ADDR_CYCLE
237#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
238#define CONFIG_SYS_NAND_PAGE_COUNT 64
239#define CONFIG_SYS_NAND_OOBSIZE 64
240#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
241#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
242#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
243
244#elif CONFIG_SYS_USE_SPIFLASH
Bo Shen9c709392015-03-27 14:23:36 +0800245#define CONFIG_SPL_SPI_LOAD
246#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
247
248#endif
Wu, Josh3f338c12013-04-16 23:42:44 +0000249
250#endif