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Sergei Poselenov9dea3812010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenov9dea3812010-09-09 23:03:31 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090019#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
Sergei Poselenov9dea3812010-09-09 23:03:31 +020020#define CONFIG_A4M072 1 /* ... on A4M072 board */
21#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
22
Wolfgang Denkfb2759c2010-10-18 23:43:37 +020023#define CONFIG_SYS_TEXT_BASE 0xFE000000
24
Sergei Poselenov9dea3812010-09-09 23:03:31 +020025#define CONFIG_MISC_INIT_R
26
27#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
28
Sergei Poselenov9dea3812010-09-09 23:03:31 +020029#define CONFIG_HIGH_BATS 1 /* High BATs supported */
30
31/*
32 * Serial console configuration
33 */
34#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
35#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
36#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
37/* define to enable silent console */
Sergei Poselenov9dea3812010-09-09 23:03:31 +020038#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
39
40/*
41 * PCI Mapping:
42 * 0x40000000 - 0x4fffffff - PCI Memory
43 * 0x50000000 - 0x50ffffff - PCI IO Space
44 */
Sergei Poselenov9dea3812010-09-09 23:03:31 +020045
46#if defined(CONFIG_PCI)
Sergei Poselenov9dea3812010-09-09 23:03:31 +020047#define CONFIG_PCI_SCAN_SHOW 1
48#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
49
50#define CONFIG_PCI_MEM_BUS 0x40000000
51#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
52#define CONFIG_PCI_MEM_SIZE 0x10000000
53
54#define CONFIG_PCI_IO_BUS 0x50000000
55#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
56#define CONFIG_PCI_IO_SIZE 0x01000000
57#endif
58
59#define CONFIG_SYS_XLB_PIPELINING 1
60
Wolfgang Denk1136f692010-10-27 22:48:30 +020061#undef CONFIG_EEPRO100
Sergei Poselenov9dea3812010-09-09 23:03:31 +020062
Sergei Poselenov9dea3812010-09-09 23:03:31 +020063/* USB */
64#define CONFIG_USB_OHCI_NEW
Sergei Poselenov9dea3812010-09-09 23:03:31 +020065#define CONFIG_SYS_OHCI_BE_CONTROLLER
66#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
67#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
68#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
69#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
70#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
71
72#define CONFIG_TIMESTAMP /* Print image info with timestamp */
73
74/*
75 * BOOTP options
76 */
77#define CONFIG_BOOTP_BOOTFILESIZE
78#define CONFIG_BOOTP_BOOTPATH
79#define CONFIG_BOOTP_GATEWAY
80#define CONFIG_BOOTP_HOSTNAME
81
Sergei Poselenov9dea3812010-09-09 23:03:31 +020082/*
83 * Command line configuration.
84 */
Sergei Poselenov9dea3812010-09-09 23:03:31 +020085#define CONFIG_CMD_EEPROM
Sergei Poselenov9dea3812010-09-09 23:03:31 +020086#define CONFIG_CMD_IDE
Ilya Yanokd0b78202010-09-09 23:03:33 +020087#define CONFIG_CMD_DISPLAY
Sergei Poselenov9dea3812010-09-09 23:03:31 +020088
89#if defined(CONFIG_PCI)
90#define CONFIG_CMD_PCI
91#endif
92
Wolfgang Denkfb2759c2010-10-18 23:43:37 +020093#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9dea3812010-09-09 23:03:31 +020094#define CONFIG_SYS_LOWBOOT 1
95#define CONFIG_SYS_LOWBOOT32 1
96#endif
97
98/*
99 * Autobooting
100 */
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200101
102#define CONFIG_SYS_AUTOLOAD "n"
103
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200104#undef CONFIG_BOOTARGS
105#define CONFIG_PREBOOT "run try_update"
106
107#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok12a92bc2010-10-21 17:20:09 +0200108 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
109 "cf1=diskboot 200000 0:1\0" \
110 "bootcmd_cf1=run bcf1\0" \
111 "bcf=setenv bootargs root=/dev/hda3\0" \
112 "bootcmd_nfs=run bnfs\0" \
113 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
114 "panic=1\0" \
115 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
116 "run norargs addip; run bk\0" \
117 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
118 "run nfsargs addip ; run bk\0" \
119 "nfsargs=setenv bootargs root=/dev/nfs rw " \
120 "nfsroot=${serverip}:${rootpath}\0" \
121 "try_update=usb start;sleep 2;usb start;sleep 1;" \
122 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
123 "source 2F0000\0" \
124 "env_addr=FE060000\0" \
125 "kernel_addr=FE100000\0" \
126 "rootfs_addr=FE200000\0" \
127 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
128 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
129 "bcf1=run cf1; run bcf; run addip; run bk\0" \
130 "add_consolespec=setenv bootargs ${bootargs} " \
131 "console=/dev/null quiet\0" \
132 "addip=if test -n ${ethaddr};" \
133 "then if test -n ${ipaddr};" \
134 "then setenv bootargs ${bootargs} " \
135 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
136 "${netmask}:${hostname}:${netdev}:off;" \
137 "fi;" \
138 "else;" \
139 "setenv bootargs ${bootargs} no_ethaddr;" \
140 "fi\0" \
141 "hostname=CPUP0\0" \
Ilya Yanok12a92bc2010-10-21 17:20:09 +0200142 "netdev=eth0\0" \
143 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200144 ""
145/*
146 * IPB Bus clocking configuration.
147 */
148#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
149
150/*
151 * I2C configuration
152 */
153#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
154#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
155
156#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
157#define CONFIG_SYS_I2C_SLAVE 0x7F
158
159/*
160 * EEPROM configuration
161 */
162#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
163#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
164#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
165#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
166#define CONFIG_SYS_EEPROM_WREN 1
167#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
168
169/*
170 * Flash configuration
171 */
172#define CONFIG_SYS_FLASH_BASE 0xFE000000
173#define CONFIG_SYS_FLASH_SIZE 0x02000000
174#if !defined(CONFIG_SYS_LOWBOOT)
175#error "CONFIG_SYS_LOWBOOT not defined?"
176#else /* CONFIG_SYS_LOWBOOT */
177#if defined(CONFIG_SYS_LOWBOOT32)
178#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
179#endif
180#endif /* CONFIG_SYS_LOWBOOT */
181
182#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
183#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
184#define CONFIG_FLASH_CFI_DRIVER
185#define CONFIG_SYS_FLASH_CFI
186#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
187#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanok537d7882010-10-21 17:20:13 +0200188#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200189
190/*
191 * Environment settings
192 */
193#define CONFIG_ENV_IS_IN_FLASH 1
194#define CONFIG_ENV_SIZE 0x10000
195#define CONFIG_ENV_SECT_SIZE 0x20000
196#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
197#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
198
199#define CONFIG_ENV_OVERWRITE 1
200
201/*
202 * Memory map
203 */
204#define CONFIG_SYS_MBAR 0xF0000000
205#define CONFIG_SYS_SDRAM_BASE 0x00000000
206#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
207
208/* Use SRAM until RAM will be available */
209#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200210#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200211
Wolfgang Denk0191e472010-10-26 14:34:52 +0200212#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200213#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
214
Wolfgang Denkfb2759c2010-10-18 23:43:37 +0200215#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200216#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
217# define CONFIG_SYS_RAMBOOT 1
218#endif
219
220#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
221#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
222#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
223
224/*
225 * Ethernet configuration
226 */
227#define CONFIG_MPC5xxx_FEC 1
228#define CONFIG_MPC5xxx_FEC_MII100
229/*
230 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
231 */
232/* #define CONFIG_MPC5xxx_FEC_MII10 */
233#define CONFIG_PHY_ADDR 0x1f
234#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
235
236/*
237 * GPIO configuration
238 */
Ilya Yanokd0b78202010-09-09 23:03:33 +0200239#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200240
241/*
242 * Miscellaneous configurable options
243 */
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200244#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200245#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200246#if defined(CONFIG_CMD_KGDB)
247#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
248#else
249#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
250#endif
251#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
252#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
253#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
254
255#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
256#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
257
258#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
259
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200260#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
261#if defined(CONFIG_CMD_KGDB)
262# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
263#endif
264
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200265/*
266 * Various low-level settings
267 */
268#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
269#define CONFIG_SYS_HID0_FINAL HID0_ICE
270/* Flash at CSBoot, CS0 */
271#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
272#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
273#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
274#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
275#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
276/* External SRAM at CS1 */
277#define CONFIG_SYS_CS1_START 0x62000000
278#define CONFIG_SYS_CS1_SIZE 0x00400000
279#define CONFIG_SYS_CS1_CFG 0x00009930
280#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
281#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokd0b78202010-09-09 23:03:33 +0200282/* LED display at CS7 */
283#define CONFIG_SYS_CS7_START 0x6a000000
284#define CONFIG_SYS_CS7_SIZE (64*1024)
285#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200286
287#define CONFIG_SYS_CS_BURST 0x00000000
288#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
289
290#define CONFIG_SYS_RESET_ADDRESS 0xff000000
291
292/*-----------------------------------------------------------------------
293 * USB stuff
294 *-----------------------------------------------------------------------
295 */
296#define CONFIG_USB_CLOCK 0x0001BBBB
297#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
298
299/*-----------------------------------------------------------------------
300 * IDE/ATA stuff Supports IDE harddisk
301 *-----------------------------------------------------------------------
302 */
303
304#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
305
306#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
307#undef CONFIG_IDE_LED /* LED for ide not supported */
308
309#define CONFIG_IDE_PREINIT
310
311#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
312#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
313
314#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
315
316#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
317
318/* Offset for data I/O */
319#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
320
321/* Offset for normal register accesses */
322#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
323
324/* Offset for alternate registers */
325#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
326
327/* Interval between registers */
328#define CONFIG_SYS_ATA_STRIDE 4
329
330#define CONFIG_ATAPI 1
331
332/*-----------------------------------------------------------------------
333 * Open firmware flat tree support
334 *-----------------------------------------------------------------------
335 */
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200336#define OF_CPU "PowerPC,5200@0"
337#define OF_SOC "soc5200@f0000000"
338#define OF_TBCLK (bd->bi_busfreq / 4)
339#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
340
Ilya Yanokd0b78202010-09-09 23:03:33 +0200341/* Support for the 7-segment display */
342#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
343#define CONFIG_SHOW_ACTIVITY /* used for display realization */
344
Ilya Yanok87339492010-09-09 23:03:34 +0200345#define CONFIG_SHOW_BOOT_PROGRESS
346
Sergei Poselenov9dea3812010-09-09 23:03:31 +0200347#endif /* __CONFIG_H */