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git01.mediatek.com / filogic / uboot / d136654ba299c033985bdfaa35d57e04089cd8b0 / . / arch / arm / mach-uniphier / clk / clk-ld4.c
blob: 62b6927732a630402360cd4daae5ade7a87ebaa3 [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]1/*
Masahiro Yamadab4eda202016-10-17 22:18:03 +0900[diff] [blame]2 * Copyright (C) 2011-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]9#include <linux/io.h>
Masahiro Yamadaefdf3402016-01-09 01:51:13 +0900[diff] [blame]10
11#include "../init.h"
12#include "../sc-regs.h"
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]13
Masahiro Yamada98905692016-03-30 20:17:02 +0900[diff] [blame]14void uniphier_ld4_clk_init(void)
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]15{
16 u32 tmp;
17
18 /* deassert reset */
19 tmp = readl(SC_RSTCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]20#ifdef CONFIG_UNIPHIER_ETH
21 tmp |= SC_RSTCTRL_NRST_ETHER;
22#endif
23#ifdef CONFIG_NAND_DENALI
24 tmp |= SC_RSTCTRL_NRST_NAND;
25#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]26 writel(tmp, SC_RSTCTRL);
27 readl(SC_RSTCTRL); /* dummy read */
28
Masahiro Yamada1c6a5e42016-03-30 20:17:42 +0900[diff] [blame]29 /* provide clocks */
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]30 tmp = readl(SC_CLKCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]31#ifdef CONFIG_UNIPHIER_ETH
32 tmp |= SC_CLKCTRL_CEN_ETHER;
33#endif
Masahiro Yamadad544ef42016-02-02 21:11:39 +0900[diff] [blame]34#ifdef CONFIG_USB_EHCI
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]35 tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]36#endif
37#ifdef CONFIG_NAND_DENALI
38 tmp |= SC_CLKCTRL_CEN_NAND;
39#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]40 writel(tmp, SC_CLKCTRL);
41 readl(SC_CLKCTRL); /* dummy read */
42}