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git01.mediatek.com / filogic / uboot / d11c3db6da92c3519c921b206ca6535981a4c192 / . / drivers / gpio / palmas_gpio.c
blob: 15039351dd55a2d71fbb4f6f93a8ad4306995ffd [file] [log] [blame]
Svyatoslav Ryhel32648d32023-07-21 10:50:15 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Based on mainline Linux palmas GPIO driver
4 * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
5 */
6
7#include <dm.h>
8#include <i2c.h>
9#include <asm/gpio.h>
10#include <power/palmas.h>
11
12#define NUM_GPIOS 8
13
14static int palmas_gpio_set_value(struct udevice *dev, unsigned int offset,
15 int value)
16{
17 struct palmas_priv *priv = dev_get_priv(dev->parent);
18 u32 reg;
19 int ret;
20
21 reg = (value) ? PALMAS_GPIO_SET_DATA_OUT : PALMAS_GPIO_CLEAR_DATA_OUT;
22
23 ret = dm_i2c_reg_write(priv->chip2, reg, BIT(offset));
24 if (ret < 0)
25 log_debug("%s: Reg 0x%02x write failed, %d\n", __func__, reg, ret);
26
27 return ret;
28}
29
30static int palmas_gpio_get_value(struct udevice *dev, unsigned int offset)
31{
32 struct palmas_priv *priv = dev_get_priv(dev->parent);
33 u32 reg;
34 int ret;
35
36 ret = dm_i2c_reg_read(priv->chip2, PALMAS_GPIO_DATA_DIR);
37 if (ret < 0) {
38 log_debug("%s: GPIO_DATA_DIR read failed, %d\n", __func__, ret);
39 return ret;
40 }
41
42 if (ret & BIT(offset))
43 reg = PALMAS_GPIO_DATA_OUT;
44 else
45 reg = PALMAS_GPIO_DATA_IN;
46
47 ret = dm_i2c_reg_read(priv->chip2, reg);
48 if (ret < 0) {
49 log_debug("%s: Reg 0x%02x read failed, %d\n", __func__, reg, ret);
50 return ret;
51 }
52
53 return !!(ret & BIT(offset));
54}
55
56static int palmas_gpio_direction_input(struct udevice *dev, unsigned int offset)
57{
58 struct palmas_priv *priv = dev_get_priv(dev->parent);
59 int ret;
60
61 ret = dm_i2c_reg_clrset(priv->chip2, PALMAS_GPIO_DATA_DIR,
62 BIT(offset), 0);
63 if (ret < 0)
64 log_debug("%s: GPIO_DATA_DIR val update failed: %d\n", __func__, ret);
65
66 return ret;
67}
68
69static int palmas_gpio_direction_output(struct udevice *dev, unsigned int offset,
70 int value)
71{
72 struct palmas_priv *priv = dev_get_priv(dev->parent);
73 int ret;
74
75 /* Set the initial value */
76 palmas_gpio_set_value(dev, offset, value);
77
78 ret = dm_i2c_reg_clrset(priv->chip2, PALMAS_GPIO_DATA_DIR,
79 BIT(offset), BIT(offset));
80 if (ret < 0)
81 log_debug("%s: GPIO_DATA_DIR val update failed: %d\n", __func__, ret);
82
83 return ret;
84}
85
86static int palmas_gpio_get_function(struct udevice *dev, unsigned int offset)
87{
88 struct palmas_priv *priv = dev_get_priv(dev->parent);
89 int ret;
90
91 ret = dm_i2c_reg_read(priv->chip2, PALMAS_GPIO_DATA_DIR);
92 if (ret < 0) {
93 log_debug("%s: GPIO_DATA_DIR read failed, %d\n", __func__, ret);
94 return ret;
95 }
96
97 if (ret & BIT(offset))
98 return GPIOF_OUTPUT;
99 else
100 return GPIOF_INPUT;
101}
102
103static const struct dm_gpio_ops palmas_gpio_ops = {
104 .direction_input = palmas_gpio_direction_input,
105 .direction_output = palmas_gpio_direction_output,
106 .get_value = palmas_gpio_get_value,
107 .set_value = palmas_gpio_set_value,
108 .get_function = palmas_gpio_get_function,
109};
110
111static int palmas_gpio_probe(struct udevice *dev)
112{
113 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
114
115 uc_priv->gpio_count = NUM_GPIOS;
116 uc_priv->bank_name = "GPIO";
117
118 return 0;
119}
120
121static const struct udevice_id palmas_ids[] = {
122 { .compatible = "ti,palmas-gpio" },
123 { }
124};
125
126U_BOOT_DRIVER(palmas_gpio) = {
127 .name = PALMAS_GPIO_DRIVER,
128 .id = UCLASS_GPIO,
129 .of_match = palmas_ids,
130 .probe = palmas_gpio_probe,
131 .ops = &palmas_gpio_ops,
132};