Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Stefan Roese <sr@denx.de> |
| 3 | * |
| 4 | * Configuration settings for the ProjectionDesign / Barco |
| 5 | * Titanium board. |
| 6 | * |
| 7 | * Based on mx6qsabrelite.h which is: |
| 8 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. |
| 9 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #ifndef __CONFIG_H |
| 14 | #define __CONFIG_H |
| 15 | |
Eric Nelson | 062772c | 2013-11-26 17:40:30 -0700 | [diff] [blame] | 16 | #include "mx6_common.h" |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 17 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 18 | #define CONFIG_MX6Q |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 19 | |
| 20 | #define MACH_TYPE_TITANIUM 3769 |
| 21 | #define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM |
| 22 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 23 | /* Size of malloc() pool */ |
| 24 | #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) |
| 25 | |
| 26 | #define CONFIG_BOARD_EARLY_INIT_F |
| 27 | #define CONFIG_MISC_INIT_R |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 28 | |
| 29 | #define CONFIG_MXC_UART |
| 30 | #define CONFIG_MXC_UART_BASE UART1_BASE |
| 31 | |
| 32 | /* I2C Configs */ |
| 33 | #define CONFIG_CMD_I2C |
trem | 0399741 | 2013-09-21 18:13:36 +0200 | [diff] [blame] | 34 | #define CONFIG_SYS_I2C |
| 35 | #define CONFIG_SYS_I2C_MXC |
York Sun | f1a5216 | 2015-03-20 10:20:40 -0700 | [diff] [blame] | 36 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 37 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 38 | |
| 39 | /* MMC Configs */ |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 40 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 41 | #define CONFIG_SYS_FSL_USDHC_NUM 1 |
| 42 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 43 | #define CONFIG_CMD_PING |
| 44 | #define CONFIG_CMD_DHCP |
| 45 | #define CONFIG_CMD_MII |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 46 | #define CONFIG_FEC_MXC |
| 47 | #define CONFIG_MII |
| 48 | #define IMX_FEC_BASE ENET_BASE_ADDR |
| 49 | #define CONFIG_FEC_XCV_TYPE RGMII |
| 50 | #define CONFIG_FEC_MXC_PHYADDR 4 |
| 51 | #define CONFIG_PHYLIB |
| 52 | #define CONFIG_PHY_MICREL |
| 53 | #define CONFIG_PHY_MICREL_KSZ9021 |
| 54 | |
| 55 | /* USB Configs */ |
| 56 | #define CONFIG_CMD_USB |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 57 | #define CONFIG_USB_EHCI |
| 58 | #define CONFIG_USB_EHCI_MX6 |
| 59 | #define CONFIG_USB_STORAGE |
| 60 | #define CONFIG_MXC_USB_PORT 1 |
| 61 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 62 | #define CONFIG_MXC_USB_FLAGS 0 |
| 63 | |
| 64 | /* Miscellaneous commands */ |
| 65 | #define CONFIG_CMD_BMODE |
| 66 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 67 | #define CONFIG_SYS_MEMTEST_START 0x10000000 |
| 68 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20)) |
| 69 | |
| 70 | #define CONFIG_HOSTNAME titanium |
| 71 | #define CONFIG_UBI_PART ubi |
| 72 | #define CONFIG_UBIFS_VOLUME rootfs0 |
| 73 | |
| 74 | #define MTDIDS_DEFAULT "nand0=gpmi-nand" |
| 75 | #define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \ |
| 76 | "512k(env2),-(ubi)" |
| 77 | |
| 78 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 79 | "kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ |
| 80 | "kernel_fs=/boot/uImage\0" \ |
| 81 | "kernel_addr=11000000\0" \ |
| 82 | "dtb=" __stringify(CONFIG_HOSTNAME) "/" \ |
| 83 | __stringify(CONFIG_HOSTNAME) ".dtb\0" \ |
| 84 | "dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \ |
| 85 | "dtb_addr=12800000\0" \ |
| 86 | "script=boot.scr\0" \ |
| 87 | "uimage=uImage\0" \ |
| 88 | "console=ttymxc0\0" \ |
| 89 | "baudrate=115200\0" \ |
| 90 | "fdt_high=0xffffffff\0" \ |
| 91 | "initrd_high=0xffffffff\0" \ |
| 92 | "mmcdev=0\0" \ |
| 93 | "mmcpart=1\0" \ |
| 94 | "uimage=uImage\0" \ |
| 95 | "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ |
| 96 | " ${script}\0" \ |
| 97 | "bootscript=echo Running bootscript from mmc ...; source\0" \ |
| 98 | "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ |
| 99 | "mmcroot=/dev/mmcblk0p2\0" \ |
| 100 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
| 101 | "root=${mmcroot} rootwait rw\0" \ |
| 102 | "bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ |
| 103 | " ${uimage}; bootm\0" \ |
| 104 | "addip=setenv bootargs ${bootargs} " \ |
| 105 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ |
| 106 | ":${hostname}:${netdev}:off panic=1\0" \ |
| 107 | "addcon=setenv bootargs ${bootargs} console=ttymxc0," \ |
| 108 | "${baudrate}\0" \ |
| 109 | "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ |
| 110 | "rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \ |
| 111 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 112 | "nfsroot=${serverip}:${rootpath}\0" \ |
| 113 | "ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \ |
| 114 | "part=" __stringify(CONFIG_UBI_PART) "\0" \ |
| 115 | "boot_vol=0\0" \ |
| 116 | "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \ |
| 117 | "load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \ |
| 118 | "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \ |
| 119 | " ${filesize}\0" \ |
| 120 | "upd_ubifs=run load_ubifs update_ubifs\0" \ |
| 121 | "init_ubi=nand erase.part ubi;ubi part ${part};" \ |
| 122 | "ubi create ${vol} c800000\0" \ |
| 123 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
| 124 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| 125 | "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \ |
| 126 | " addcon addmtd;" \ |
| 127 | "bootm ${kernel_addr} - ${dtb_addr}\0" \ |
| 128 | "ubifsargs=set bootargs ubi.mtd=ubi " \ |
| 129 | "root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \ |
| 130 | "ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \ |
| 131 | "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \ |
| 132 | "ubifsload ${dtb_addr} ${dtb_fs};\0" \ |
| 133 | "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \ |
| 134 | "addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \ |
| 135 | "load_kernel=tftp ${kernel_addr} ${kernel}\0" \ |
| 136 | "load_dtb=tftp ${dtb_addr} ${dtb}\0" \ |
| 137 | "net_nfs=run load_dtb load_kernel; " \ |
| 138 | "run nfsargs addip addcon addmtd;" \ |
| 139 | "bootm ${kernel_addr} - ${dtb_addr}\0" \ |
| 140 | "delenv=env default -a -f; saveenv; reset\0" |
| 141 | |
| 142 | #define CONFIG_BOOTCOMMAND "run nand_ubifs" |
| 143 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 144 | /* Print Buffer Size */ |
| 145 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 146 | sizeof(CONFIG_SYS_PROMPT) + 16) |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 147 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 148 | /* Physical Memory Map */ |
| 149 | #define CONFIG_NR_DRAM_BANKS 1 |
| 150 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 151 | #define PHYS_SDRAM_SIZE (512 << 20) |
| 152 | |
| 153 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 154 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 155 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 156 | |
| 157 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 158 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 159 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 160 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 161 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 162 | /* Enable NAND support */ |
| 163 | #define CONFIG_CMD_NAND |
| 164 | #define CONFIG_CMD_NAND_TRIMFFS |
| 165 | #define CONFIG_CMD_TIME |
| 166 | |
| 167 | #ifdef CONFIG_CMD_NAND |
| 168 | |
| 169 | /* NAND stuff */ |
| 170 | #define CONFIG_NAND_MXS |
| 171 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 172 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 173 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 174 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 175 | |
| 176 | /* DMA stuff, needed for GPMI/MXS NAND support */ |
| 177 | #define CONFIG_APBH_DMA |
| 178 | #define CONFIG_APBH_DMA_BURST |
| 179 | #define CONFIG_APBH_DMA_BURST8 |
| 180 | |
| 181 | /* Environment in NAND */ |
| 182 | #define CONFIG_ENV_IS_IN_NAND |
| 183 | #define CONFIG_ENV_OFFSET (16 << 20) |
| 184 | #define CONFIG_ENV_SECT_SIZE (128 << 10) |
| 185 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 186 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10)) |
| 187 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| 188 | |
| 189 | #else /* CONFIG_CMD_NAND */ |
| 190 | |
| 191 | /* Environment in MMC */ |
| 192 | #define CONFIG_ENV_SIZE (8 << 10) |
| 193 | #define CONFIG_ENV_IS_IN_MMC |
| 194 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
| 195 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 196 | |
| 197 | #endif /* CONFIG_CMD_NAND */ |
| 198 | |
| 199 | /* UBI/UBIFS config options */ |
| 200 | #define CONFIG_LZO |
| 201 | #define CONFIG_MTD_DEVICE |
| 202 | #define CONFIG_MTD_PARTITIONS |
| 203 | #define CONFIG_RBTREE |
| 204 | #define CONFIG_CMD_MTDPARTS |
| 205 | #define CONFIG_CMD_UBI |
| 206 | #define CONFIG_CMD_UBIFS |
| 207 | |
Stefan Roese | 05d10b5 | 2013-04-17 00:32:43 +0000 | [diff] [blame] | 208 | #endif /* __CONFIG_H */ |