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SARTRE Leodce71762013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leodce71762013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leodce71762013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leodce71762013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
SARTRE Leodce71762013-06-03 23:30:36 +000020/* Size of malloc() pool */
21#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
22
23#define CONFIG_BOARD_EARLY_INIT_F
24#define CONFIG_MISC_INIT_R
SARTRE Leodce71762013-06-03 23:30:36 +000025
26#define CONFIG_MXC_UART
27#define CONFIG_MXC_UART_BASE UART2_BASE
28
29/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000030#define CONFIG_SYS_FSL_ESDHC_ADDR 0
31
SARTRE Leodce71762013-06-03 23:30:36 +000032/* Miscellaneous commands */
33#define CONFIG_CMD_BMODE
34
Otavio Salvador38881002015-07-23 11:02:27 -030035/* Thermal support */
36#define CONFIG_IMX6_THERMAL
37
38#define CONFIG_CMD_FUSE
39#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
40#define CONFIG_MXC_OCOTP
41#endif
42
Otavio Salvador0378d632015-07-23 11:02:28 -030043/* I2C Configs */
44#define CONFIG_CMD_I2C
45#define CONFIG_SYS_I2C
46#define CONFIG_SYS_I2C_MXC
47#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48#define CONFIG_SYS_I2C_SPEED 100000
49
50/* PMIC */
51#define CONFIG_POWER
52#define CONFIG_POWER_I2C
53#define CONFIG_POWER_PFUZE100
54#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
55
Otavio Salvadorc8762d02015-07-23 11:02:29 -030056/* USB Configs */
57#define CONFIG_CMD_USB
58#define CONFIG_CMD_FAT
59#define CONFIG_USB_EHCI
60#define CONFIG_USB_EHCI_MX6
61#define CONFIG_USB_STORAGE
62#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
63#define CONFIG_USB_HOST_ETHER
64#define CONFIG_USB_ETHER_ASIX
65#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
66#define CONFIG_MXC_USB_FLAGS 0
67#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
68#define CONFIG_USB_KEYBOARD
69#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
70
Otavio Salvador6c46cd12015-07-23 11:02:30 -030071/* Framebuffer */
72#define CONFIG_VIDEO
73#define CONFIG_VIDEO_IPUV3
74#define CONFIG_CFB_CONSOLE
75#define CONFIG_VGA_AS_SINGLE_DEVICE
76#define CONFIG_SYS_CONSOLE_IS_IN_ENV
77#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
78#define CONFIG_VIDEO_BMP_RLE8
79#define CONFIG_SPLASH_SCREEN
80#define CONFIG_SPLASH_SCREEN_ALIGN
81#define CONFIG_BMP_16BPP
82#define CONFIG_VIDEO_LOGO
83#define CONFIG_VIDEO_BMP_LOGO
84#ifdef CONFIG_MX6DL
85#define CONFIG_IPUV3_CLK 198000000
86#else
87#define CONFIG_IPUV3_CLK 264000000
88#endif
89#define CONFIG_IMX_HDMI
90
Otavio Salvadordf82d002015-07-23 11:02:31 -030091/* SATA */
92#define CONFIG_CMD_SATA
93#define CONFIG_DWC_AHSATA
94#define CONFIG_SYS_SATA_MAX_DEVICE 1
95#define CONFIG_DWC_AHSATA_PORT_ID 0
96#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
97#define CONFIG_LBA48
98#define CONFIG_LIBATA
99
Otavio Salvador4ac01402015-07-23 11:02:33 -0300100/* Command definition */
101
102#define CONFIG_MXC_UART_BASE UART2_BASE
103#define CONFIG_CONSOLE_DEV "ttymxc1"
104#define CONFIG_MMCROOT "/dev/mmcblk0p2"
105#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +0000106
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -0200109 "image=zImage\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300110 "fdtfile=imx6q-qmx6.dtb\0" \
111 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000112 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300113 "ip_dyn=yes\0" \
114 "console=" CONFIG_CONSOLE_DEV "\0" \
115 "bootm_size=0x10000000\0" \
116 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000117 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300118 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
119 "update_sd_firmware=" \
120 "if test ${ip_dyn} = yes; then " \
121 "setenv get_cmd dhcp; " \
122 "else " \
123 "setenv get_cmd tftp; " \
124 "fi; " \
125 "if mmc dev ${mmcdev}; then " \
126 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
127 "setexpr fw_sz ${filesize} / 0x200; " \
128 "setexpr fw_sz ${fw_sz} + 1; " \
129 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
130 "fi; " \
131 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000132 "mmcargs=setenv bootargs console=${console},${baudrate} " \
133 "root=${mmcroot}\0" \
134 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300135 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000136 "bootscript=echo Running bootscript from mmc ...; " \
137 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300138 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
139 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000140 "mmcboot=echo Booting from mmc ...; " \
141 "run mmcargs; " \
142 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
143 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300144 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000145 "else " \
146 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200147 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000148 "else " \
149 "echo WARN: Cannot load the DT; " \
150 "fi; " \
151 "fi; " \
152 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200153 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300154 "fi;\0" \
155 "netargs=setenv bootargs console=${console},${baudrate} " \
156 "root=/dev/nfs " \
157 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
158 "netboot=echo Booting from net ...; " \
159 "run netargs; " \
160 "if test ${ip_dyn} = yes; then " \
161 "setenv get_cmd dhcp; " \
162 "else " \
163 "setenv get_cmd tftp; " \
164 "fi; " \
165 "${get_cmd} ${image}; " \
166 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
167 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
168 "bootz ${loadaddr} - ${fdt_addr_r}; " \
169 "else " \
170 "if test ${boot_fdt} = try; then " \
171 "bootz; " \
172 "else " \
173 "echo WARN: Cannot load the DT; " \
174 "fi; " \
175 "fi; " \
176 "else " \
177 "bootz; " \
178 "fi;\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000179
180#define CONFIG_BOOTCOMMAND \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300181 "mmc dev ${mmcdev};" \
182 "if mmc rescan; then " \
183 "if run loadbootscript; then " \
184 "run bootscript; " \
185 "else " \
186 "if run loadimage; then " \
187 "run mmcboot; " \
188 "else run netboot; " \
189 "fi; " \
190 "fi; " \
191 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000192
SARTRE Leodce71762013-06-03 23:30:36 +0000193#define CONFIG_SYS_MEMTEST_START 0x10000000
194#define CONFIG_SYS_MEMTEST_END 0x10010000
195#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
196
SARTRE Leodce71762013-06-03 23:30:36 +0000197/* Physical Memory Map */
198#define CONFIG_NR_DRAM_BANKS 1
199#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
200#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
201
202#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
203#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
204#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
205
206#define CONFIG_SYS_INIT_SP_OFFSET \
207 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
208#define CONFIG_SYS_INIT_SP_ADDR \
209 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
210
Peter Robinson4b671502015-05-22 17:30:45 +0100211/* Environment organization */
SARTRE Leodce71762013-06-03 23:30:36 +0000212#define CONFIG_ENV_SIZE (8 * 1024)
213
214#define CONFIG_ENV_IS_IN_MMC
215
216#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
217#define CONFIG_SYS_MMC_ENV_DEV 0
218
SARTRE Leodce71762013-06-03 23:30:36 +0000219#endif /* __CONFIG_CGTQMX6EVAL_H */