Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 2 | /* |
Jean-Christophe PLAGNIOL-VILLARD | 5170410 | 2009-06-04 12:06:47 +0200 | [diff] [blame] | 3 | * (C) Copyright 2009 |
| 4 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 5 | * |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 6 | * (C) Copyright 2007-2012 |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 7 | * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| 8 | * |
| 9 | * (C) Copyright 2003 |
| 10 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Nobuhiro Iwamatsu | 0121325 | 2008-07-08 12:03:24 +0900 | [diff] [blame] | 14 | #include <asm/processor.h> |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 15 | #include <asm/io.h> |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 16 | #include <sh_tmu.h> |
| 17 | |
Nobuhiro Iwamatsu | cc18f8d | 2013-07-23 13:57:24 +0900 | [diff] [blame] | 18 | #define TCR_TPSC 0x07 |
| 19 | |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 20 | static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 21 | |
Nobuhiro Iwamatsu | f7be78e | 2012-08-21 13:24:43 +0900 | [diff] [blame] | 22 | unsigned long get_tbclk(void) |
| 23 | { |
Nobuhiro Iwamatsu | 4547782 | 2013-08-20 14:33:15 +0900 | [diff] [blame] | 24 | u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; |
| 25 | return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2); |
Nobuhiro Iwamatsu | f7be78e | 2012-08-21 13:24:43 +0900 | [diff] [blame] | 26 | } |
| 27 | |
Rob Herring | 7a626f0 | 2013-10-04 10:22:42 -0500 | [diff] [blame] | 28 | unsigned long timer_read_counter(void) |
Jean-Christophe PLAGNIOL-VILLARD | 5170410 | 2009-06-04 12:06:47 +0200 | [diff] [blame] | 29 | { |
Rob Herring | 7a626f0 | 2013-10-04 10:22:42 -0500 | [diff] [blame] | 30 | return ~readl(&tmu->tcnt0); |
Jean-Christophe PLAGNIOL-VILLARD | 5170410 | 2009-06-04 12:06:47 +0200 | [diff] [blame] | 31 | } |
| 32 | |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 33 | static void tmu_timer_start(unsigned int timer) |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 34 | { |
| 35 | if (timer > 2) |
| 36 | return; |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 37 | writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr); |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 38 | } |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 39 | |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 40 | static void tmu_timer_stop(unsigned int timer) |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 41 | { |
| 42 | if (timer > 2) |
| 43 | return; |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 44 | writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr); |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 45 | } |
| 46 | |
Nobuhiro Iwamatsu | e763f1a | 2012-08-21 13:14:46 +0900 | [diff] [blame] | 47 | int timer_init(void) |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 48 | { |
Nobuhiro Iwamatsu | 4547782 | 2013-08-20 14:33:15 +0900 | [diff] [blame] | 49 | u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; |
| 50 | writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0); |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 51 | |
Nobuhiro Iwamatsu | ac89047 | 2008-11-20 16:44:42 +0900 | [diff] [blame] | 52 | tmu_timer_stop(0); |
| 53 | tmu_timer_start(0); |
| 54 | |
Nobuhiro Iwamatsu | 970dc33 | 2007-05-13 20:58:00 +0900 | [diff] [blame] | 55 | return 0; |
| 56 | } |
| 57 | |