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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +09002/*
Jean-Christophe PLAGNIOL-VILLARD51704102009-06-04 12:06:47 +02003 * (C) Copyright 2009
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +09006 * (C) Copyright 2007-2012
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +09007 * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
8 *
9 * (C) Copyright 2003
10 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090011 */
12
13#include <common.h>
Nobuhiro Iwamatsu01213252008-07-08 12:03:24 +090014#include <asm/processor.h>
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090015#include <asm/io.h>
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090016#include <sh_tmu.h>
17
Nobuhiro Iwamatsucc18f8d2013-07-23 13:57:24 +090018#define TCR_TPSC 0x07
19
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090020static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090021
Nobuhiro Iwamatsuf7be78e2012-08-21 13:24:43 +090022unsigned long get_tbclk(void)
23{
Nobuhiro Iwamatsu45477822013-08-20 14:33:15 +090024 u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
25 return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2);
Nobuhiro Iwamatsuf7be78e2012-08-21 13:24:43 +090026}
27
Rob Herring7a626f02013-10-04 10:22:42 -050028unsigned long timer_read_counter(void)
Jean-Christophe PLAGNIOL-VILLARD51704102009-06-04 12:06:47 +020029{
Rob Herring7a626f02013-10-04 10:22:42 -050030 return ~readl(&tmu->tcnt0);
Jean-Christophe PLAGNIOL-VILLARD51704102009-06-04 12:06:47 +020031}
32
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090033static void tmu_timer_start(unsigned int timer)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090034{
35 if (timer > 2)
36 return;
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090037 writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr);
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090038}
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090039
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090040static void tmu_timer_stop(unsigned int timer)
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090041{
42 if (timer > 2)
43 return;
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090044 writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090045}
46
Nobuhiro Iwamatsue763f1a2012-08-21 13:14:46 +090047int timer_init(void)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090048{
Nobuhiro Iwamatsu45477822013-08-20 14:33:15 +090049 u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
50 writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0);
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090051
Nobuhiro Iwamatsuac890472008-11-20 16:44:42 +090052 tmu_timer_stop(0);
53 tmu_timer_start(0);
54
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090055 return 0;
56}
57