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git01.mediatek.com / filogic / uboot / d0d3e5e268ef05b6b070853e1e8de0c4844afc99 / . / arch / arm / dts / tegra20-trimslice.dts
blob: e19001ee2bdfdfc6e074c9beaa3158ee0ec3cb0f [file] [log] [blame]
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrenf6236152013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]4
5/ {
6 model = "Compulab TrimSlice board";
7 compatible = "compulab,trimslice", "nvidia,tegra20";
8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uarta;
11 };
12
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]13 aliases {
Stephen Warrene4ae2d42016-09-15 12:19:38 -0600[diff] [blame]14 usb0 = "/usb@c5000000";
Stephen Warrend55aadc2016-09-13 10:45:43 -0600[diff] [blame]15 mmc0 = "/sdhci@c8000600";
16 mmc1 = "/sdhci@c8000000";
Simon Glassb4381ee2014-10-13 23:42:12 -0600[diff] [blame]17 spi0 = "/spi@7000c380";
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]18 };
19
20 memory {
21 reg = <0x00000000 0x40000000>;
22 };
23
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]24 serial@70006000 {
25 clock-frequency = <216000000>;
26 };
27
Allen Martin523e4d62013-01-29 13:51:23 +0000[diff] [blame]28 spi@7000c380 {
29 status = "okay";
30 spi-max-frequency = <25000000>;
31 };
32
Thierry Reding2afec172019-04-15 11:32:37 +0200[diff] [blame]33 pcie@80003000 {
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]34 status = "okay";
35
36 avdd-pex-supply = <&pci_vdd_reg>;
37 vdd-pex-supply = <&pci_vdd_reg>;
38 avdd-pex-pll-supply = <&pci_vdd_reg>;
39 avdd-plle-supply = <&pci_vdd_reg>;
40 vddio-pex-clk-supply = <&pci_clk_reg>;
41
42 pci@1,0 {
43 status = "okay";
44 };
45 };
46
Stephen Warren48edf192012-05-30 06:45:50 +0000[diff] [blame]47 usb@c5000000 {
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]48 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]49 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]50 };
51
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]52 sdhci@c8000000 {
53 status = "okay";
54 bus-width = <4>;
55 };
56
57 sdhci@c8000600 {
58 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]59 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
60 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]61 bus-width = <4>;
62 };
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]63
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]64 clocks {
65 compatible = "simple-bus";
66 #address-cells = <1>;
67 #size-cells = <0>;
68
69 clk32k_in: clock@0 {
70 compatible = "fixed-clock";
71 reg=<0>;
72 #clock-cells = <0>;
73 clock-frequency = <32768>;
74 };
75 };
76
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]77 regulators {
78 compatible = "simple-bus";
79 #address-cells = <1>;
80 #size-cells = <0>;
81
82 hdmi_vdd_reg: regulator@0 {
83 compatible = "regulator-fixed";
84 reg = <0>;
85 regulator-name = "avdd_hdmi";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 regulator-always-on;
89 };
90
91 hdmi_pll_reg: regulator@1 {
92 compatible = "regulator-fixed";
93 reg = <1>;
94 regulator-name = "avdd_hdmi_pll";
95 regulator-min-microvolt = <1800000>;
96 regulator-max-microvolt = <1800000>;
97 regulator-always-on;
98 };
99
100 vbus_reg: regulator@2 {
101 compatible = "regulator-fixed";
102 reg = <2>;
103 regulator-name = "usb1_vbus";
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
106 enable-active-high;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]107 gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]108 regulator-always-on;
109 regulator-boot-on;
110 };
111
112 pci_clk_reg: regulator@3 {
113 compatible = "regulator-fixed";
114 reg = <3>;
115 regulator-name = "pci_clk";
116 regulator-min-microvolt = <3300000>;
117 regulator-max-microvolt = <3300000>;
118 regulator-always-on;
119 };
120
121 pci_vdd_reg: regulator@4 {
122 compatible = "regulator-fixed";
123 reg = <4>;
124 regulator-name = "pci_vdd";
125 regulator-min-microvolt = <1050000>;
126 regulator-max-microvolt = <1050000>;
127 regulator-always-on;
128 };
129 };
130
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]131};
Simon Glass2a00cc92017-06-12 06:22:01 -0600[diff] [blame]132
133&uarta {
134 status = "okay";
135};