wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * BRIEF MODULE DESCRIPTION |
| 4 | * TI H2 and P2 Debug Board hardware map |
| 5 | * |
| 6 | * Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk) |
| 7 | * Author: MPC-Data Limited |
| 8 | * Dave Peverley |
| 9 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #ifndef __INCLUDED_H2_P2_DBH_BOARD_H |
| 14 | #define __INCLUDED_H2_P2_DBH_BOARD_H |
| 15 | |
Andreas Bießmann | c959998 | 2010-09-24 23:31:43 +0200 | [diff] [blame] | 16 | #include <asm/sizes.h> |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 17 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 18 | /* |
| 19 | * The Debug board is designed to function with the P2 Sample, H2 |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 20 | * Sample and 1610 Innovator boards. The main difference AFAICT is |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 21 | * the chip selects used with each system ; |
| 22 | * |
| 23 | * P2 Sample : CS1 of OMAP730 is used to select the CPLD & LAN regs |
| 24 | * H2 Sample : CS1a is used to select the CPLD registers. |
| 25 | * |
| 26 | */ |
| 27 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 28 | /*************************************************************************** |
| 29 | * CPLD Registers |
| 30 | **************************************************************************/ |
| 31 | |
| 32 | #define H2DBG_CPLD_REVISION 0x04000010 |
| 33 | #define H2DBG_BOARD_REVISION 0x04000012 |
| 34 | #define H2DBG_GPIO_REGISTER 0x04000014 |
| 35 | #define H2DBG_LED_CONTROL 0x04000016 |
| 36 | #define H2DBG_MISC_INPUT 0x04000018 |
| 37 | #define H2DBG_LAN_STATUS 0x0400001A |
| 38 | #define H2DBG_LAN_RESET 0x0400001C |
| 39 | #define H2DBG_ETH_REG_BASE 0x04000300 |
| 40 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 41 | /*************************************************************************** |
| 42 | * Ethernet Control Registers |
| 43 | * These are for the LAN91C96 on the debug board |
| 44 | **************************************************************************/ |
| 45 | |
| 46 | /* Bank 0 in IO space */ |
| 47 | |
| 48 | #define ETH_TCR (H2DBG_ETH_REG_BASE + 0x00) /* Transmit Control Register */ |
| 49 | #define ETH_EPH_STATUS (H2DBG_ETH_REG_BASE + 0x02) /* EPH Status Register */ |
| 50 | #define ETH_RCR (H2DBG_ETH_REG_BASE + 0x04) /* Receive Control Register */ |
| 51 | #define ETH_COUNTER (H2DBG_ETH_REG_BASE + 0x06) /* Counter Register */ |
| 52 | #define ETH_MIR (H2DBG_ETH_REG_BASE + 0x08) /* Memory Information Register */ |
| 53 | #define ETH_MCR (H2DBG_ETH_REG_BASE + 0x0A) /* Memory Configuration Register */ |
| 54 | |
| 55 | /* Bank 1 in IO space */ |
| 56 | |
| 57 | #define ETH_CONFIG (H2DBG_ETH_REG_BASE + 0x00) /* Configuration Register */ |
| 58 | #define ETH_BASE (H2DBG_ETH_REG_BASE + 0x02) /* Base Address Register */ |
| 59 | #define ETH_IA0 (H2DBG_ETH_REG_BASE + 0x04) /* Individual Address Register - 0 */ |
| 60 | #define ETH_IA1 (H2DBG_ETH_REG_BASE + 0x05) /* Individual Address Register - 1 */ |
| 61 | #define ETH_IA2 (H2DBG_ETH_REG_BASE + 0x06) /* Individual Address Register - 2 */ |
| 62 | #define ETH_IA3 (H2DBG_ETH_REG_BASE + 0x07) /* Individual Address Register - 3 */ |
| 63 | #define ETH_IA4 (H2DBG_ETH_REG_BASE + 0x08) /* Individual Address Register - 4 */ |
| 64 | #define ETH_IA5 (H2DBG_ETH_REG_BASE + 0x09) /* Individual Address Register - 5 */ |
| 65 | #define ETH_GEN_PURPOSE (H2DBG_ETH_REG_BASE + 0x0A) /* General Address Registers */ |
| 66 | #define ETH_CONTROL (H2DBG_ETH_REG_BASE + 0x0B) /* Control Register */ |
| 67 | |
| 68 | /* Bank 2 in IO space */ |
| 69 | |
| 70 | #define ETH_MMU (H2DBG_ETH_REG_BASE + 0x00) /* MMU Command Register */ |
| 71 | #define ETH_AUTO_TX_START (H2DBG_ETH_REG_BASE + 0x01) /* Auto Tx Start Register */ |
| 72 | #define ETH_PNR (H2DBG_ETH_REG_BASE + 0x02) /* Packet Number Register */ |
| 73 | #define ETH_ARR (H2DBG_ETH_REG_BASE + 0x03) /* Allocation Result Register */ |
| 74 | #define ETH_FIFO (H2DBG_ETH_REG_BASE + 0x04) /* FIFO Ports Register */ |
| 75 | #define ETH_POINTER (H2DBG_ETH_REG_BASE + 0x06) /* Pointer Register */ |
| 76 | #define ETH_DATA_HIGH (H2DBG_ETH_REG_BASE + 0x08) /* Data High Register */ |
| 77 | #define ETH_DATA_LOW (H2DBG_ETH_REG_BASE + 0x0A) /* Data Low Register */ |
| 78 | #define ETH_INT_STATS (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Status Register - RO */ |
| 79 | #define ETH_INT_ACK (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Acknowledge Register -WO */ |
| 80 | #define ETH_INT_MASK (H2DBG_ETH_REG_BASE + 0x0D) /* Interrupt Mask Register */ |
| 81 | |
| 82 | |
| 83 | #ifndef __ASSEMBLY__ |
| 84 | |
| 85 | /* |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 86 | * A couple of utility inlines to aid debugging using the LED's on the |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 87 | * debug board. |
| 88 | */ |
| 89 | |
| 90 | static inline void set_led_state(int state) |
| 91 | { |
| 92 | static unsigned long hw_led_state = 0; |
wdenk | f2140d5 | 2004-07-01 16:30:44 +0000 | [diff] [blame] | 93 | volatile unsigned short *led_address = (volatile unsigned short *)0x04000016; |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 94 | |
| 95 | hw_led_state = ((unsigned long)state); |
| 96 | *((unsigned short *) (led_address)) = (unsigned short) (~hw_led_state & 0xFFFF); |
| 97 | } |
| 98 | |
| 99 | |
wdenk | f2140d5 | 2004-07-01 16:30:44 +0000 | [diff] [blame] | 100 | static inline void spin_up_leds(void) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 101 | { |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 102 | volatile int i, j, k; |
| 103 | |
| 104 | for (k = 0; k < 2; k++) { |
| 105 | for (i = 0; i < 16; i++) { |
| 106 | for (j = 0; j < 5000; j++) { |
| 107 | set_led_state(1 << i); |
| 108 | } |
| 109 | } |
| 110 | for (i = 15; i >= 0; i--) { |
| 111 | for (j = 0; j < 5000; j++) { |
| 112 | set_led_state(1 << i); |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | #endif /* ! __ASSEMBLY__ */ |
| 119 | |
| 120 | #endif /* ! __INCLUDED_H2_P2_DBH_BOARD_H */ |