blob: 918422379457f9c346db9ca2daa7c3a7388ced43 [file] [log] [blame]
Xiangfu Liu2f46d422011-10-12 12:24:06 +08001/*
2 * Jz4740 UART support
3 * Copyright (c) 2011
4 * Qi Hardware, Xiangfu Liu <xiangfu@sharism.cc>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Xiangfu Liu2f46d422011-10-12 12:24:06 +08007 */
8
9#include <config.h>
10#include <common.h>
11#include <asm/io.h>
12#include <asm/jz4740.h>
Marek Vasut76cb60d2012-09-13 01:20:59 +020013#include <serial.h>
14#include <linux/compiler.h>
Xiangfu Liu2f46d422011-10-12 12:24:06 +080015
16/*
17 * serial_init - initialize a channel
18 *
19 * This routine initializes the number of data bits, parity
20 * and set the selected baud rate. Interrupts are disabled.
21 * Set the modem control signals if the option is selected.
22 *
23 * RETURNS: N/A
24 */
25struct jz4740_uart *uart = (struct jz4740_uart *)CONFIG_SYS_UART_BASE;
26
Marek Vasut76cb60d2012-09-13 01:20:59 +020027static int jz_serial_init(void)
Xiangfu Liu2f46d422011-10-12 12:24:06 +080028{
29 /* Disable port interrupts while changing hardware */
30 writeb(0, &uart->dlhr_ier);
31
32 /* Disable UART unit function */
33 writeb(~UART_FCR_UUE, &uart->iir_fcr);
34
35 /* Set both receiver and transmitter in UART mode (not SIR) */
36 writeb(~(SIRCR_RSIRE | SIRCR_TSIRE), &uart->isr);
37
38 /*
39 * Set databits, stopbits and parity.
40 * (8-bit data, 1 stopbit, no parity)
41 */
42 writeb(UART_LCR_WLEN_8 | UART_LCR_STOP_1, &uart->lcr);
43
44 /* Set baud rate */
45 serial_setbrg();
46
47 /* Enable UART unit, enable and clear FIFO */
48 writeb(UART_FCR_UUE | UART_FCR_FE | UART_FCR_TFLS | UART_FCR_RFLS,
49 &uart->iir_fcr);
50
51 return 0;
52}
53
Marek Vasut76cb60d2012-09-13 01:20:59 +020054static void jz_serial_setbrg(void)
Xiangfu Liu2f46d422011-10-12 12:24:06 +080055{
56 u32 baud_div, tmp;
57
58 baud_div = CONFIG_SYS_EXTAL / 16 / CONFIG_BAUDRATE;
59
60 tmp = readb(&uart->lcr);
61 tmp |= UART_LCR_DLAB;
62 writeb(tmp, &uart->lcr);
63
64 writeb((baud_div >> 8) & 0xff, &uart->dlhr_ier);
65 writeb(baud_div & 0xff, &uart->rbr_thr_dllr);
66
67 tmp &= ~UART_LCR_DLAB;
68 writeb(tmp, &uart->lcr);
69}
70
Marek Vasut76cb60d2012-09-13 01:20:59 +020071static int jz_serial_tstc(void)
Xiangfu Liu2f46d422011-10-12 12:24:06 +080072{
73 if (readb(&uart->lsr) & UART_LSR_DR)
74 return 1;
75
76 return 0;
77}
78
Marek Vasut76cb60d2012-09-13 01:20:59 +020079static void jz_serial_putc(const char c)
Xiangfu Liu2f46d422011-10-12 12:24:06 +080080{
81 if (c == '\n')
82 serial_putc('\r');
83
84 /* Wait for fifo to shift out some bytes */
85 while (!((readb(&uart->lsr) & (UART_LSR_TDRQ | UART_LSR_TEMT)) == 0x60))
86 ;
87
88 writeb((u8)c, &uart->rbr_thr_dllr);
89}
90
Marek Vasut76cb60d2012-09-13 01:20:59 +020091static int jz_serial_getc(void)
Xiangfu Liu2f46d422011-10-12 12:24:06 +080092{
93 while (!serial_tstc())
94 ;
95
96 return readb(&uart->rbr_thr_dllr);
97}
98
Marek Vasut76cb60d2012-09-13 01:20:59 +020099static struct serial_device jz_serial_drv = {
100 .name = "jz_serial",
101 .start = jz_serial_init,
102 .stop = NULL,
103 .setbrg = jz_serial_setbrg,
104 .putc = jz_serial_putc,
Marek Vasutd9c64492012-10-06 14:07:02 +0000105 .puts = default_serial_puts,
Marek Vasut76cb60d2012-09-13 01:20:59 +0200106 .getc = jz_serial_getc,
107 .tstc = jz_serial_tstc,
108};
109
110void jz_serial_initialize(void)
111{
112 serial_register(&jz_serial_drv);
113}
114
115__weak struct serial_device *default_serial_console(void)
116{
117 return &jz_serial_drv;
118}