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git01.mediatek.com / filogic / uboot / d031b9e08bde651178e2e6693ed300cec1b0e2a2 / . / arch / arm / dts / am335x-pxm2.dtsi
blob: 8d58cd4c917d3beebf6013b742a087958f65ecfd [file] [log] [blame]
Heiko Schocher107ef972016-06-13 15:16:01 +0200[diff] [blame]1/*
2 * Copyright (C) 2014 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
4 *
5 * Based on:
6 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include "am33xx.dtsi"
14#include <dt-bindings/input/input.h>
15
16/ {
17 chosen {
18 stdout-path = &uart0;
19 tick-timer = &timer2;
20 };
21
22 cpus {
23 cpu@0 {
24 cpu0-supply = <&vdd1_reg>;
25 };
26 };
27
28 backlight0: backlight {
29 compatible = "pwm-backlight";
30 pwms = <&ecap0 0 50000 0>;
31 brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
32 38 40 43 45 48 51 53 56 58 61 63 66 68 71
33 73 76 79 81 84 86 89 91 94 96 99 102 104
34 107 109 112 114 117 119 122 124 127 130
35 132 135 137 140 142 145 147 150 153 155
36 158 160 163 165 168 170 173 175 178 181
37 183 186 188 191 193 196 198 201 204 206
38 209 211 214 216 219 221 224 226 229 232
39 234 237 239 242 244 247 249 252 255>;
40 default-brightness-level = <80>;
41 power-supply = <&backlight_reg>;
42 enable-gpios = <&gpio3 16 0>;
43 };
44
45 backlight_reg: fixedregulator0 {
46 compatible = "regulator-fixed";
47 regulator-name = "backlight_reg";
48 regulator-boot-on;
49 };
50
51 gpio_keys: restart-keys {
52 compatible = "gpio-keys";
53 #address-cells = <1>;
54 #size-cells = <0>;
55 autorepeat;
56
57 restart0 {
58 label = "restart";
59 linux,code = <KEY_RESTART>;
60 gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
61 gpio-key,wakeup;
62 };
63 };
64
65 leds {
66 compatible = "gpio-leds";
67
68 led_blue {
69 label = "blue";
70 gpios = <&gpio3 20 0>;
71 };
72 led_green {
73 label = "green";
74 gpios = <&gpio1 31 0>;
75 };
76 led_red {
77 label = "red";
78 gpios = <&gpio3 21 0>;
79 };
80 };
81
82 memory {
83 device_type = "memory";
84 reg = <0x80000000 0x10000000>; /* 256 MB */
85 };
86
87 reg_lcd_3v3: fixedregulator1 {
88 compatible = "regulator-gpio";
89 regulator-name = "lcd-3v3";
90 regulator-min-microvolt = <1800000>;
91 regulator-max-microvolt = <3300000>;
92 regulator-type = "voltage";
93 startup-delay-us = <100>;
94 states = <1800000 0x1
95 2900000 0x0>;
96 enable-at-boot;
97 gpios = <&gpio3 19 0>;
98 enable-active-high;
99 };
100
101 vbat: fixedregulator2 {
102 compatible = "regulator-fixed";
103 regulator-name = "vbat";
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
106 regulator-boot-on;
107 };
108
109 vmmc: fixedregulator3 {
110 compatible = "regulator-fixed";
111 regulator-name = "vmmc";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 };
115};
116
117&cppi41dma {
118 status = "okay";
119};
120
121&cpsw_emac0 {
122 phy_id = <&davinci_mdio>, <0>;
123 phy-mode = "rgmii-txid";
124};
125
126&cpsw_emac1 {
127 phy_id = <&davinci_mdio>, <1>;
128 phy-mode = "rgmii-txid";
129};
130
131&davinci_mdio {
132 pinctrl-names = "default", "sleep";
133 pinctrl-0 = <&davinci_mdio_default>;
134 pinctrl-1 = <&davinci_mdio_sleep>;
135 status = "okay";
136};
137
138&elm {
139 status = "okay";
140};
141
142&epwmss0 {
143 status = "okay";
144
145 ecap0: ecap@48300100 {
146 status = "okay";
147 pinctrl-names = "default";
148 pinctrl-0 = <&ecap0_pins>;
149 };
150};
151
152&gpmc {
153 pinctrl-names = "default";
154 pinctrl-0 = <&nandflash_pins>;
155 status = "okay";
156
157 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
158
159 nand@0,0 {
160 reg = <0 0 0>; /* CS0, offset 0 */
161 nand-bus-width = <8>;
162 ti,nand-ecc-opt = "bch8";
163 gpmc,device-nand = "true";
164 gpmc,device-width = <1>;
165 gpmc,sync-clk-ps = <0>;
166 gpmc,cs-on-ns = <0>;
167 gpmc,cs-rd-off-ns = <44>;
168 gpmc,cs-wr-off-ns = <44>;
169 gpmc,adv-on-ns = <6>;
170 gpmc,adv-rd-off-ns = <34>;
171 gpmc,adv-wr-off-ns = <44>;
172 gpmc,we-on-ns = <0>;
173 gpmc,we-off-ns = <40>;
174 gpmc,oe-on-ns = <0>;
175 gpmc,oe-off-ns = <54>;
176 gpmc,access-ns = <64>;
177 gpmc,rd-cycle-ns = <82>;
178 gpmc,wr-cycle-ns = <82>;
179 gpmc,wait-on-read = "true";
180 gpmc,wait-on-write = "true";
181 gpmc,bus-turnaround-ns = <0>;
182 gpmc,cycle2cycle-delay-ns = <0>;
183 gpmc,clk-activation-ns = <0>;
184 gpmc,wait-monitoring-ns = <0>;
185 gpmc,wr-access-ns = <40>;
186 gpmc,wr-data-mux-bus-ns = <0>;
187
188 #address-cells = <1>;
189 #size-cells = <1>;
190 elm_id = <&elm>;
191 };
192};
193
194&i2c0 {
195 pinctrl-names = "default";
196 pinctrl-0 = <&i2c0_pins>;
197 clock-frequency = <400000>;
198 status = "okay";
199
200 tps: tps@2d {
201 reg = <0x2d>;
202 };
203 eeprom: eeprom@50 {
204 compatible = "atmel,24c128";
205 reg = <0x50>;
206 pagesize = <32>;
207 };
208};
209
210&i2c1 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&i2c1_pins>;
213 clock-frequency = <100000>;
214 status = "okay";
215
216 tsl2563: tsl2563@49 {
217 compatible = "amstaos,tsl2563";
218 reg = <0x49>;
219 };
220};
221
222&i2c2 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&i2c2_pins>;
225 clock-frequency = <100000>;
226 status = "okay";
227
228 egalax_ts@04 {
229 compatible = "eeti,egalax_ts";
230 reg = <0x04>;
231 interrupt-parent = <&gpio1>;
232 interrupts = <24 2>;
233 wakeup-gpios = <&gpio1 25 0>;
234 };
235};
236
237&lcdc {
238 status = "okay";
239};
240
241&mac {
242 pinctrl-names = "default", "sleep";
243 pinctrl-0 = <&cpsw_default>;
244 pinctrl-1 = <&cpsw_sleep>;
245 status = "okay";
246};
247
248&mmc1 {
249 vmmc-supply = <&vmmc>;
250 bus-width = <4>;
251 cd-gpios = <&gpio0 6 0>;
252 wp-gpios = <&gpio3 18 0>;
253 status = "okay";
254};
255
256&phy_sel {
257 rgmii-no-delay;
258};
259
260#include "tps65910.dtsi"
261
262&tps {
263 vcc1-supply = <&vbat>;
264 vcc2-supply = <&vbat>;
265 vcc3-supply = <&vbat>;
266 vcc4-supply = <&vbat>;
267 vcc5-supply = <&vbat>;
268 vcc6-supply = <&vbat>;
269 vcc7-supply = <&vbat>;
270 vccio-supply = <&vbat>;
271
272 regulators {
273 vrtc_reg: regulator@0 {
274 regulator-always-on;
275 };
276
277 vio_reg: regulator@1 {
278 regulator-always-on;
279 };
280
281 vdd1_reg: regulator@2 {
282 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
283 regulator-name = "vdd_mpu";
284 regulator-min-microvolt = <912500>;
285 regulator-max-microvolt = <1312500>;
286 regulator-boot-on;
287 regulator-always-on;
288 };
289
290 vdd2_reg: regulator@3 {
291 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
292 regulator-name = "vdd_core";
293 regulator-min-microvolt = <912500>;
294 regulator-max-microvolt = <1150000>;
295 regulator-boot-on;
296 regulator-always-on;
297 };
298
299 vdd3_reg: regulator@4 {
300 regulator-always-on;
301 };
302
303 vdig1_reg: regulator@5 {
304 regulator-always-on;
305 };
306
307 vdig2_reg: regulator@6 {
308 regulator-always-on;
309 };
310
311 vpll_reg: regulator@7 {
312 regulator-always-on;
313 };
314
315 vdac_reg: regulator@8 {
316 regulator-always-on;
317 };
318
319 vaux1_reg: regulator@9 {
320 regulator-always-on;
321 };
322
323 vaux2_reg: regulator@10 {
324 regulator-always-on;
325 };
326
327 vaux33_reg: regulator@11 {
328 regulator-always-on;
329 };
330
331 vmmc_reg: regulator@12 {
332 regulator-min-microvolt = <1800000>;
333 regulator-max-microvolt = <3300000>;
334 regulator-always-on;
335 };
336 };
337};
338
339&uart0 {
340 pinctrl-names = "default";
341 pinctrl-0 = <&uart0_pins>;
342
343 status = "okay";
344};
345
346&usb {
347 status = "okay";
348};
349
350&usb_ctrl_mod {
351 status = "okay";
352};
353
354&usb0 {
355 status = "okay";
356};
357
358&usb1 {
359 dr_mode = "host";
360 status = "okay";
361};
362
363&usb0_phy {
364 status = "okay";
365};
366
367&usb1_phy {
368 status = "okay";
369};
370
371&am33xx_pinmux {
372 pinctrl-names = "default";
373 pinctrl-0 = <&clkout2_pin &gpio_pin>;
374
375 clkout2_pin: pinmux_clkout2_pin {
376 pinctrl-single,pins = <
377 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
378 >;
379 };
380
381 cpsw_default: cpsw_default {
382 pinctrl-single,pins = <
383 /* Slave 1 */
384 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
385 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
386 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
387 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
388 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
389 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
390 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
391 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
392 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
393 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
394 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
395 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
396 >;
397 };
398
399 cpsw_sleep: cpsw_sleep {
400 pinctrl-single,pins = <
401 /* Slave 1 reset value */
402 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
403 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
404 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
405 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
406 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
407 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
408 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
409 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
410 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
411 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
412 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
413 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
414 >;
415 };
416
417 davinci_mdio_default: davinci_mdio_default {
418 pinctrl-single,pins = <
419 /* MDIO */
420 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
421 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
422 >;
423 };
424
425 davinci_mdio_sleep: davinci_mdio_sleep {
426 pinctrl-single,pins = <
427 /* MDIO reset value */
428 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
429 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
430 >;
431 };
432
433 ecap0_pins: ecap_pins {
434 pinctrl-single,pins = <
435 0x198 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_axr0.gpio3_16 Backlight enable */
436 0x164 (MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
437 >;
438 };
439
440
441 gpio_pin: gpio_pin {
442 pinctrl-single,pins = <
443 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 touch reset */
444 0x60 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 touch irq */
445 0x64 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a9.gpio1_25 touch power */
446 0x6c (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a11.gpio1_27 pad14 to DFU */
447 0x21c (MUX_MODE0) /* usb0_drvvbus */
448 0x234 (MUX_MODE0) /* usb1_drvvbus */
449 0x1a0 (PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
450 0x160 (PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_sdcd */
451 >;
452 };
453
454 i2c0_pins: pinmux_i2c0_pins {
455 pinctrl-single,pins = <
456 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
457 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
458 >;
459 };
460
461 i2c1_pins: pinmux_i2c1_pins {
462 pinctrl-single,pins = <
463 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
464 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
465 >;
466 };
467
468 i2c2_pins: pinmux_i2c2_pins {
469 pinctrl-single,pins = <
470 0x150 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_sclk.i2c2_sda */
471 0x154 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c2_scl */
472 >;
473 };
474
475 lcd_pins_s0: lcd_pins_s0 {
476 pinctrl-single,pins = <
477 0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
478 0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
479 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
480 0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
481 0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
482 0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
483 0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
484 0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
485 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
486 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
487 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
488 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
489 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
490 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
491 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
492 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
493 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
494 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
495 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
496 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
497 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
498 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
499 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
500 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
501 0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
502 0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
503 0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
504 0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
505 0x194 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* mcasp0_fsx.gpio3_15 LCD enable */
506 >;
507 };
508
509 nandflash_pins: pinmux_nandflash_pins {
510 pinctrl-single,pins = <
511 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
512 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
513 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
514 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
515 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
516 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
517 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
518 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
519 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
520 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
521 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
522 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
523 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
524 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
525 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
526 >;
527 };
528
529 uart0_pins: pinmux_uart0_pins {
530 pinctrl-single,pins = <
531 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
532 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
533 >;
534 };
535};
536
537&wdt2 {
538 wdt-keep-enabled;
539};