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Paul Burtonf5de32a2016-09-08 07:47:39 +01001/*
2 * Copyright (C) 2016 Imagination Technologies
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7#ifndef __CONFIGS_BOSTON_H__
8#define __CONFIGS_BOSTON_H__
9
10/*
Paul Burtonfc9d3bf2017-04-30 21:22:43 +020011 * General board configuration
12 */
13#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
14
15/*
Paul Burtonf5de32a2016-09-08 07:47:39 +010016 * CPU
17 */
18#define CONFIG_SYS_MIPS_TIMER_FREQ 30000000
19
20/*
21 * PCI
22 */
Paul Burtonf5de32a2016-09-08 07:47:39 +010023
24/*
25 * Memory map
26 */
27#ifdef CONFIG_64BIT
28# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
29#else
30# define CONFIG_SYS_SDRAM_BASE 0x80000000
31#endif
32
33#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
34
35#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
36
Paul Burton6f9e8d22017-11-21 12:35:31 -080037#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
Paul Burtonf5de32a2016-09-08 07:47:39 +010038
39#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0)
40#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000)
41
42#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
43
44/*
45 * Console
46 */
Paul Burtonf5de32a2016-09-08 07:47:39 +010047
48/*
49 * Flash
50 */
51#define CONFIG_FLASH_CFI_DRIVER
52#define CONFIG_SYS_FLASH_CFI
53#define CONFIG_SYS_FLASH_PROTECTION
54#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
55#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
56#define CONFIG_SYS_MAX_FLASH_SECT 1024
57
58/*
59 * Environment
60 */
Paul Burtonf5de32a2016-09-08 07:47:39 +010061#define CONFIG_ENV_SECT_SIZE 0x20000
62#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
63#ifdef CONFIG_64BIT
64# define CONFIG_ENV_ADDR \
65 (0xffffffffb8000000 + (128 << 20) - CONFIG_ENV_SIZE)
66#else
67# define CONFIG_ENV_ADDR \
68 (0xb8000000 + (128 << 20) - CONFIG_ENV_SIZE)
69#endif
70
71#endif /* __CONFIGS_BOSTON_H__ */