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goda.yusukefd768072008-01-25 20:46:36 +09001/*
2 * Configuation settings for the Renesas Solutions Migo-R board
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
goda.yusukefd768072008-01-25 20:46:36 +09007 */
8
9#ifndef __MIGO_R_H
10#define __MIGO_R_H
11
goda.yusukefd768072008-01-25 20:46:36 +090012#define CONFIG_CPU_SH7722 1
goda.yusukefd768072008-01-25 20:46:36 +090013
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020014#define CONFIG_DISPLAY_BOARDINFO
goda.yusukefd768072008-01-25 20:46:36 +090015#undef CONFIG_SHOW_BOOT_PROGRESS
16
17/* SMC9111 */
Ben Warren0fd6aae2009-10-04 22:37:03 -070018#define CONFIG_SMC91111
goda.yusukefd768072008-01-25 20:46:36 +090019#define CONFIG_SMC91111_BASE (0xB0000000)
20
21/* MEMORY */
22#define MIGO_R_SDRAM_BASE (0x8C000000)
23#define MIGO_R_FLASH_BASE_1 (0xA0000000)
24#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
25
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020026#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020027#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
goda.yusukefd768072008-01-25 20:46:36 +090028
29/* SCIF */
goda.yusukefd768072008-01-25 20:46:36 +090030#define CONFIG_CONS_SCIF0 1
goda.yusukefd768072008-01-25 20:46:36 +090031
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
33#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
goda.yusukefd768072008-01-25 20:46:36 +090034
35/* Enable alternate, more extensive, memory test */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020036#undef CONFIG_SYS_ALT_MEMTEST
goda.yusukefd768072008-01-25 20:46:36 +090037/* Scratch address used by the alternate memory test */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038#undef CONFIG_SYS_MEMTEST_SCRATCH
goda.yusukefd768072008-01-25 20:46:36 +090039
40/* Enable temporary baudrate change while serial download */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020041#undef CONFIG_SYS_LOADS_BAUD_CHANGE
goda.yusukefd768072008-01-25 20:46:36 +090042
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020043#define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
goda.yusukefd768072008-01-25 20:46:36 +090044/* maybe more, but if so u-boot doesn't know about it... */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
goda.yusukefd768072008-01-25 20:46:36 +090046/* default load address for scripts ?!? */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020047#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
goda.yusukefd768072008-01-25 20:46:36 +090048
49/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020050#define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukefd768072008-01-25 20:46:36 +090051/* Monitor size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
goda.yusukefd768072008-01-25 20:46:36 +090053/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020055#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
goda.yusukefd768072008-01-25 20:46:36 +090056
57/* FLASH */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020058#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +020059#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020060#undef CONFIG_SYS_FLASH_QUIET_TEST
goda.yusukefd768072008-01-25 20:46:36 +090061/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020062#define CONFIG_SYS_FLASH_EMPTY_INFO
goda.yusukefd768072008-01-25 20:46:36 +090063/* Physical start address of Flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064#define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukefd768072008-01-25 20:46:36 +090065/* Max number of sectors on each Flash chip */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020066#define CONFIG_SYS_MAX_FLASH_SECT 512
goda.yusukefd768072008-01-25 20:46:36 +090067
68/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020069#define CONFIG_SYS_MAX_FLASH_BANKS 1
70#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
goda.yusukefd768072008-01-25 20:46:36 +090071
72/* Timeout for Flash erase operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
goda.yusukefd768072008-01-25 20:46:36 +090074/* Timeout for Flash write operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
goda.yusukefd768072008-01-25 20:46:36 +090076/* Timeout for Flash set sector lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
goda.yusukefd768072008-01-25 20:46:36 +090078/* Timeout for Flash clear lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020079#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
goda.yusukefd768072008-01-25 20:46:36 +090080
81/* Use hardware flash sectors protection instead of U-Boot software protection */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020082#undef CONFIG_SYS_FLASH_PROTECTION
83#undef CONFIG_SYS_DIRECT_FLASH_TFTP
goda.yusukefd768072008-01-25 20:46:36 +090084
85/* ENV setting */
goda.yusukefd768072008-01-25 20:46:36 +090086#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020087#define CONFIG_ENV_SECT_SIZE (128 * 1024)
88#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
90/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
91#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020092#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
goda.yusukefd768072008-01-25 20:46:36 +090093
94/* Board Clock */
95#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +090096#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
97#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARD32e6acc2009-06-04 12:06:48 +020098#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
goda.yusukefd768072008-01-25 20:46:36 +090099
100#endif /* __MIGO_R_H */