Jon Loeliger | 3b971c9 | 2007-10-16 15:26:51 -0500 | [diff] [blame] | 1 | Freescale MPC8610HPCD board |
| 2 | =========================== |
| 3 | |
| 4 | |
| 5 | Building U-Boot |
| 6 | --------------- |
| 7 | |
| 8 | $ make MPC8610HPCD_config |
| 9 | Configuring for MPC8610HPCD board... |
| 10 | |
| 11 | $ make |
| 12 | |
| 13 | |
| 14 | Flashing U-Boot |
| 15 | --------------- |
| 16 | The flash is 128M starting at 0xF800_0000. |
| 17 | |
| 18 | The alternate image is at 0xFBF0_0000 |
| 19 | The boot image is at 0xFFF0_0000. |
| 20 | |
| 21 | |
| 22 | To Flash U-Boot into the booting bank: |
| 23 | |
| 24 | tftp 1000000 u-boot.bin |
| 25 | protect off all |
| 26 | erase fff00000 +$filesize |
| 27 | cp.b 1000000 fff00000 $filesize |
| 28 | |
| 29 | |
| 30 | To Flash U-boot into the alternate bank |
| 31 | |
| 32 | tftp 1000000 u-boot.bin |
| 33 | erase fbf00000 +$filesize |
| 34 | cp.b 1000000 fbf00000 $filesize |
| 35 | |
| 36 | |
| 37 | pixis_reset command |
| 38 | ------------------- |
| 39 | A new command, "pixis_reset", is introduced to reset mpc8610hpcd board |
| 40 | using the FPGA sequencer. When the board restarts, it has the option |
| 41 | of using either the current or alternate flash bank as the boot |
| 42 | image, with or without the watchdog timer enabled, and finally with |
| 43 | or without frequency changes. |
| 44 | |
| 45 | Usage is; |
| 46 | |
| 47 | pixis_reset |
| 48 | pixis_reset altbank |
| 49 | pixis_reset altbank wd |
| 50 | pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| 51 | pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| 52 | |
| 53 | Examples; |
| 54 | |
| 55 | /* reset to current bank, like "reset" command */ |
| 56 | pixis_reset |
| 57 | |
| 58 | /* reset board but use the to alternate flash bank */ |
| 59 | pixis_reset altbank |
| 60 | |
| 61 | /* reset board, use alternate flash bank with watchdog timer enabled*/ |
| 62 | pixis_reset altbank wd |
| 63 | |
| 64 | /* reset board to alternate bank with frequency changed. |
| 65 | * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio |
| 66 | */ |
| 67 | pixis-reset altbank cf 40 2.5 10 |
Jon Loeliger | cf9ac6f | 2008-02-20 15:26:51 -0600 | [diff] [blame^] | 68 | |
| 69 | |
| 70 | DIP Switch Settings |
| 71 | ------------------- |
| 72 | To manually switch the flash banks using the DIP switch |
| 73 | settings, toggle both SW6:1 and SW6:2. |