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git01.mediatek.com / filogic / uboot / cf88b7c8d015c42b11b230ef3c494fc0e1fbaf19 / . / include / configs / mx6sabresd.h
blob: bfc4f6181478fd8f781ef9a00b453527385c8e3b [file] [log] [blame]
Fabio Estevam77e62892012-09-13 03:18:20 +0000[diff] [blame]1/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam77e62892012-09-13 03:18:20 +0000[diff] [blame]7 */
8
Fabio Estevamc5ca8972012-09-24 08:09:32 +0000[diff] [blame]9#ifndef __MX6QSABRESD_CONFIG_H
10#define __MX6QSABRESD_CONFIG_H
Fabio Estevam77e62892012-09-13 03:18:20 +0000[diff] [blame]11
John Tobias7706eae2014-11-12 14:27:44 -0800[diff] [blame]12#ifdef CONFIG_SPL
13#define CONFIG_SPL_LIBCOMMON_SUPPORT
14#define CONFIG_SPL_MMC_SUPPORT
15#include "imx6_spl.h"
16#endif
17
Fabio Estevam77e62892012-09-13 03:18:20 +0000[diff] [blame]18#define CONFIG_MACH_TYPE 3980
Fabio Estevamc5ca8972012-09-24 08:09:32 +0000[diff] [blame]19#define CONFIG_MXC_UART_BASE UART1_BASE
Otavio Salvador1c0b9be2012-09-26 11:37:01 +0000[diff] [blame]20#define CONFIG_CONSOLE_DEV "ttymxc0"
Otavio Salvadorc0bfaab2012-10-02 09:22:10 +0000[diff] [blame]21#define CONFIG_MMCROOT "/dev/mmcblk1p2"
Fabio Estevam77e62892012-09-13 03:18:20 +0000[diff] [blame]22
Otavio Salvador134629c2014-01-06 13:27:20 -0200[diff] [blame]23#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
24
Pierre Aubertec10aed2013-06-04 09:00:15 +0200[diff] [blame]25#include "mx6sabre_common.h"
Otavio Salvador1c0b9be2012-09-26 11:37:01 +0000[diff] [blame]26
Shawn Guo7e5e8332012-12-30 14:14:59 +0000[diff] [blame]27#define CONFIG_SYS_FSL_USDHC_NUM 3
28#if defined(CONFIG_ENV_IS_IN_MMC)
Fabio Estevam3cce37d2013-01-10 09:00:53 +0000[diff] [blame]29#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
Shawn Guo7e5e8332012-12-30 14:14:59 +0000[diff] [blame]30#endif
31
Marek Vasut0e99f012014-03-23 22:45:41 +0100[diff] [blame]32#define CONFIG_CMD_PCI
33#ifdef CONFIG_CMD_PCI
34#define CONFIG_PCI
35#define CONFIG_PCI_PNP
36#define CONFIG_PCI_SCAN_SHOW
37#define CONFIG_PCIE_IMX
38#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
39#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
40#endif
41
Fabio Estevamba92ad62014-05-09 13:15:42 -0300[diff] [blame]42/* I2C Configs */
43#define CONFIG_CMD_I2C
44#define CONFIG_SYS_I2C
45#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +0200[diff] [blame]46#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -0700[diff] [blame]48#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevamba92ad62014-05-09 13:15:42 -0300[diff] [blame]49#define CONFIG_SYS_I2C_SPEED 100000
50
51/* PMIC */
52#define CONFIG_POWER
53#define CONFIG_POWER_I2C
54#define CONFIG_POWER_PFUZE100
55#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
56
Peng Fanc9498fa2014-12-02 09:55:27 +0800[diff] [blame]57/* USB Configs */
58#define CONFIG_CMD_USB
59#ifdef CONFIG_CMD_USB
60#define CONFIG_USB_EHCI
61#define CONFIG_USB_EHCI_MX6
62#define CONFIG_USB_STORAGE
63#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
64#define CONFIG_USB_HOST_ETHER
65#define CONFIG_USB_ETHER_ASIX
66#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
67#define CONFIG_MXC_USB_FLAGS 0
68#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
69#endif
70
Fabio Estevamc5ca8972012-09-24 08:09:32 +0000[diff] [blame]71#endif /* __MX6QSABRESD_CONFIG_H */