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git01.mediatek.com / filogic / uboot / cf3cd803c614e1890bc4a9f00fc0928b652b3a66 / . / drivers / mtd / nand / spi / esmt.c
blob: 7e07b26827a75ab3cce866f81688d54e4775fd90 [file] [log] [blame]
Igor Prusov175ce492023-10-17 22:29:26 +0300[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Author:
4 * Chuanhong Guo <gch981213@gmail.com> - the main driver logic
5 * Martin Kurbanov <mmkurbanov@sberdevices.ru> - OOB layout
6 */
7
8#ifndef __UBOOT__
9#include <linux/device.h>
10#include <linux/kernel.h>
11#endif
12#include <linux/mtd/spinand.h>
13
14/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
15#define SPINAND_MFR_ESMT_C8 0xc8
16
17static SPINAND_OP_VARIANTS(read_cache_variants,
18 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
19 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
20 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
21 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
22
23static SPINAND_OP_VARIANTS(write_cache_variants,
24 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
25 SPINAND_PROG_LOAD(true, 0, NULL, 0));
26
27static SPINAND_OP_VARIANTS(update_cache_variants,
28 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
29 SPINAND_PROG_LOAD(false, 0, NULL, 0));
30
31/*
32 * OOB spare area map (64 bytes)
33 *
34 * Bad Block Markers
35 * filled by HW and kernel Reserved
36 * | +-----------------------+-----------------------+
37 * | | | |
38 * | | OOB free data Area |non ECC protected |
39 * | +-------------|-----+-----------------|-----+-----------------|-----+
40 * | | | | | | | |
41 * +-|---|----------+--|-----|--------------+--|-----|--------------+--|-----|--------------+
42 * | | | section0 | | | section1 | | | section2 | | | section3 |
43 * +-v-+-v-+---+----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+
44 * | | | | | | | | | | | | | | | | |
45 * |0:1|2:3|4:7|8:15|16:17|18:19|20:23|24:31|32:33|34:35|36:39|40:47|48:49|50:51|52:55|56:63|
46 * | | | | | | | | | | | | | | | | |
47 * +---+---+-^-+--^-+-----+-----+--^--+--^--+-----+-----+--^--+--^--+-----+-----+--^--+--^--+
48 * | | | | | | | |
49 * | +----------------|-----+-----------------|-----+-----------------|-----+
50 * | ECC Area|(Main + Spare) - filled|by ESMT NAND HW |
51 * | | | |
52 * +---------------------+-----------------------+-----------------------+
53 * OOB ECC protected Area - not used due to
54 * partial programming from some filesystems
55 * (like JFFS2 with cleanmarkers)
56 */
57
58#define ESMT_OOB_SECTION_COUNT 4
59#define ESMT_OOB_SECTION_SIZE(nand) \
60 (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT)
61#define ESMT_OOB_FREE_SIZE(nand) \
62 (ESMT_OOB_SECTION_SIZE(nand) / 2)
63#define ESMT_OOB_ECC_SIZE(nand) \
64 (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand))
65#define ESMT_OOB_BBM_SIZE 2
66
67static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
68 struct mtd_oob_region *region)
69{
70 struct nand_device *nand = mtd_to_nanddev(mtd);
71
72 if (section >= ESMT_OOB_SECTION_COUNT)
73 return -ERANGE;
74
75 region->offset = section * ESMT_OOB_SECTION_SIZE(nand) +
76 ESMT_OOB_FREE_SIZE(nand);
77 region->length = ESMT_OOB_ECC_SIZE(nand);
78
79 return 0;
80}
81
82static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
83 struct mtd_oob_region *region)
84{
85 struct nand_device *nand = mtd_to_nanddev(mtd);
86
87 if (section >= ESMT_OOB_SECTION_COUNT)
88 return -ERANGE;
89
90 /*
91 * Reserve space for bad blocks markers (section0) and
92 * reserved bytes (sections 1-3)
93 */
94 region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + 2;
95
96 /* Use only 2 non-protected ECC bytes per each OOB section */
97 region->length = 2;
98
99 return 0;
100}
101
102static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
103 .ecc = f50l1g41lb_ooblayout_ecc,
104 .rfree = f50l1g41lb_ooblayout_free,
105};
106
107static const struct spinand_info esmt_c8_spinand_table[] = {
108 SPINAND_INFO("F50L1G41LB",
109 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
110 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
111 NAND_ECCREQ(1, 512),
112 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
113 &write_cache_variants,
114 &update_cache_variants),
115 0,
116 SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
117 SPINAND_INFO("F50D1G41LB",
118 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
119 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
120 NAND_ECCREQ(1, 512),
121 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
122 &write_cache_variants,
123 &update_cache_variants),
124 0,
125 SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
126};
127
128static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
129};
130
131const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
132 .id = SPINAND_MFR_ESMT_C8,
133 .name = "ESMT",
134 .chips = esmt_c8_spinand_table,
135 .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
136 .ops = &esmt_spinand_manuf_ops,
137};