| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 1 | CONFIG_MIPS=y |
| 2 | CONFIG_SYS_TEXT_BASE=0xffffffff80000000 |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x4000 |
| Stefan Roese | fc54933 | 2020-07-30 13:56:22 +0200 | [diff] [blame] | 4 | CONFIG_NR_DRAM_BANKS=2 |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 5 | CONFIG_ENV_SIZE=0x2000 |
| 6 | CONFIG_ENV_SECT_SIZE=0x10000 |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 7 | CONFIG_DEBUG_UART_BASE=0x8001180000000800 |
| 8 | CONFIG_DEBUG_UART_CLOCK=1200000000 |
| 9 | CONFIG_ARCH_OCTEON=y |
| 10 | # CONFIG_MIPS_CACHE_SETUP is not set |
| 11 | # CONFIG_MIPS_CACHE_DISABLE is not set |
| 12 | CONFIG_DEBUG_UART=y |
| 13 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
| 14 | CONFIG_HUSH_PARSER=y |
| Stefan Roese | fc54933 | 2020-07-30 13:56:22 +0200 | [diff] [blame] | 15 | CONFIG_CMD_GPIO=y |
| 16 | CONFIG_CMD_I2C=y |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 17 | CONFIG_CMD_MTD=y |
| 18 | CONFIG_CMD_PCI=y |
| 19 | CONFIG_CMD_DHCP=y |
| 20 | CONFIG_CMD_PING=y |
| 21 | CONFIG_CMD_TIME=y |
| 22 | CONFIG_ENV_IS_IN_FLASH=y |
| 23 | CONFIG_ENV_ADDR=0x1FBFE000 |
| 24 | CONFIG_CLK=y |
| 25 | # CONFIG_INPUT is not set |
| 26 | CONFIG_MTD=y |
| 27 | CONFIG_DM_MTD=y |
| 28 | CONFIG_MTD_NOR_FLASH=y |
| 29 | CONFIG_FLASH_CFI_DRIVER=y |
| 30 | CONFIG_CFI_FLASH=y |
| 31 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y |
| 32 | CONFIG_FLASH_CFI_MTD=y |
| 33 | CONFIG_SYS_FLASH_CFI=y |
| Stefan Roese | fc54933 | 2020-07-30 13:56:22 +0200 | [diff] [blame] | 34 | CONFIG_DM_SPI_FLASH=y |
| 35 | CONFIG_SPI_FLASH_ATMEL=y |
| 36 | CONFIG_SPI_FLASH_SPANSION=y |
| 37 | CONFIG_SPI_FLASH_STMICRO=y |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 38 | # CONFIG_NETDEVICES is not set |
| Stefan Roese | fc54933 | 2020-07-30 13:56:22 +0200 | [diff] [blame] | 39 | CONFIG_PCI=y |
| 40 | CONFIG_DM_PCI=y |
| Stefan Roese | 82ba278 | 2020-09-02 08:29:10 +0200 | [diff] [blame] | 41 | CONFIG_RAM=y |
| 42 | CONFIG_RAM_OCTEON=y |
| 43 | CONFIG_RAM_OCTEON_DDR4=y |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 44 | CONFIG_DEBUG_UART_SHIFT=3 |
| 45 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 46 | CONFIG_SYS_NS16550=y |
| Stefan Roese | fc54933 | 2020-07-30 13:56:22 +0200 | [diff] [blame] | 47 | CONFIG_SPI=y |
| 48 | CONFIG_OCTEON_SPI=y |
| Stefan Roese | a6f2ea4 | 2020-06-30 12:08:58 +0200 | [diff] [blame] | 49 | CONFIG_SYSRESET=y |
| 50 | CONFIG_SYSRESET_OCTEON=y |
| 51 | CONFIG_HEXDUMP=y |