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git01.mediatek.com / filogic / uboot / cefdc034bbf172d12e1278e478ee28f2f0241d0c / . / arch / arm / dts / imx8mn-beacon-kit-u-boot.dtsi
blob: 4be0098b2c350ac3426d3acd7ac6a6f124ddacce [file] [log] [blame]
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
Adam Ford81cae7f2022-10-21 19:58:32 -0500[diff] [blame]3 * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]4 */
5
Adam Ford81cae7f2022-10-21 19:58:32 -0500[diff] [blame]6#include "imx8mn-u-boot.dtsi"
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]7
8&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]9 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]10};
11
12&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]13 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]14};
15
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]16&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]17 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]18};
19
20&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]21 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]22};
23
24&i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]25 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]26};
27
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]28&pca6416_0 {
29 compatible = "ti,tca6416";
30};
31
32&pca6416_1 {
33 compatible = "ti,tca6416";
34};
35
36&pinctrl_i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]37 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]38};
39
40&pinctrl_pmic {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]41 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]42};
43
44&pinctrl_uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]45 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]46};
47
48&pinctrl_usdhc2_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]49 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]50};
51
52&pinctrl_usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]54};
55
56&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]57 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]58};
59
60&reg_usdhc2_vmmc {
61 u-boot,off-on-delay-us = <20000>;
62};
63
Adam Forda3c2df92021-09-10 15:19:22 -0500[diff] [blame]64&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]65 bootph-pre-ram;
Adam Forda3c2df92021-09-10 15:19:22 -0500[diff] [blame]66};
67
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]68&usdhc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]69 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]70 sd-uhs-sdr104;
71 sd-uhs-ddr50;
72};
73
74&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]75 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]76 sd-uhs-sdr104;
77 sd-uhs-ddr50;
78};
79
80&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]81 bootph-pre-ram;
Adam Fordd42247d2020-12-11 06:01:46 -0600[diff] [blame]82 mmc-hs400-1_8v;
83 mmc-hs400-enhanced-strobe;
84};
85
Peng Fan94bef152022-06-11 20:21:06 +0800[diff] [blame]86&pinctrl_wdog {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]87 bootph-pre-ram;
Peng Fan94bef152022-06-11 20:21:06 +0800[diff] [blame]88};