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git01.mediatek.com / filogic / uboot / cee346c940407882fc4f4a0440aa7b0b0afbfd8e / . / arch / m68k / cpu / mcf530x / start.S
blob: 552e0204b771f5a294d4e81f1cbbab2f52783309 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]2/*
3 * (C) Copyright 2015 Angelo Dureghello <angelo@sysam.it>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]5 */
6
7#include <asm-offsets.h>
8#include <config.h>
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]9#include <asm/cache.h>
10
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]11#define _START _start
12#define _FAULT _fault
13
14
15.macro SAVE_ALL
16 move.w #0x2700,%sr; /* disable intrs */
17 subl #60,%sp; /* space for 15 regs */
18 moveml %d0-%d7/%a0-%a6,%sp@
19.endm
20
21.macro RESTORE_ALL
22 moveml %sp@,%d0-%d7/%a0-%a6;
23 addl #60,%sp; /* space for 15 regs */
24 rte
25.endm
26
27/* If we come from a pre-loader we don't need an initial exception
28 * table.
29 */
30#if !defined(CONFIG_MONITOR_IS_IN_RAM)
31
32.text
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]33
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]34/*
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]35 * Vector table. This is used for initial platform startup.
36 * These vectors are to catch any un-intended traps.
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]37 */
38_vectors:
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]39/* Flash offset is 0 until we setup CS0 */
40.long 0x00000000
41#if defined(CONFIG_M5307) && \
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]42 (CONFIG_TEXT_BASE == CFG_SYS_INT_FLASH_BASE)
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]43.long _start - CONFIG_TEXT_BASE
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]44#else
45.long _START
46#endif
47
48.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
49.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
50.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
51.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
52.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
53.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
54.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
55.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56
57.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
58.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
59.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
60.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
64.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65
66.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
68.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74
75.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83
84#endif
85
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]86.text
87
88.globl _start
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]89_start:
90 nop
91 nop
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]92 move.w #0x2700,%sr
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]93
94 /* set MBAR address + valid flag */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]95 move.l #(CFG_SYS_MBAR + 1), %d0
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]96 move.c %d0, %MBAR
97
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]98 move.l #(CFG_SYS_INIT_RAM_ADDR + 1), %d0
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]99 move.c %d0, %RAMBAR
100
101 /* DS 4.8.2 (Cache Organization) invalidate and disable cache */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]102 move.l #CF_CACR_CINVA, %d0
103 movec %d0, %CACR
104 move.l #0, %d0
105 movec %d0, %ACR0
106 movec %d0, %ACR1
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]107
108 /*
109 * if we come from a pre-loader we have no exception table and
110 * therefore no VBR to set
111 */
112#if !defined(CONFIG_MONITOR_IS_IN_RAM)
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]113 move.l #CFG_SYS_FLASH_BASE, %d0
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]114 movec %d0, %VBR
115#endif
116
117 /* initialize general use internal ram */
118 move.l #0, %d0
119 move.l #(ICACHE_STATUS), %a1 /* icache */
120 move.l #(DCACHE_STATUS), %a2 /* dcache */
121 move.l %d0, (%a1)
122 move.l %d0, (%a2)
123
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]124 /* put relocation table address to a5 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]125 move.l #__got_start, %a5
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]126
127 /* setup stack initially on top of internal static ram */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500[diff] [blame]128 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]129
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]130 /*
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]131 * if configured, malloc_f arena will be reserved first,
132 * then (and always) gd struct space will be reserved
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]133 */
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]134 move.l %sp, -(%sp)
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]135 move.l #board_init_f_alloc_reserve, %a1
136 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]137
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]138 /* update stack and frame-pointers */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]139 move.l %d0, %sp
140 move.l %sp, %fp
angelo@sysam.itef9707c2016-04-27 21:50:44 +0200[diff] [blame]141
142 /* initialize reserved area */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]143 move.l %d0, -(%sp)
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]144 move.l #board_init_f_init_reserve, %a1
145 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]146
147 /* run low-level CPU init code (from flash) */
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]148 move.l #cpu_init_f, %a1
149 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]150
151 /* run low-level board init code (from flash) */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]152 clr.l %sp@-
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]153 move.l #board_init_f, %a1
154 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]155
156 /* board_init_f() does not return */
157
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]158/******************************************************************************/
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]159
160/*
Simon Glass284f71b2019-12-28 10:44:45 -0700[diff] [blame]161 * void relocate_code(addr_sp, gd, addr_moni)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]162 *
163 * This "function" does not return, instead it continues in RAM
164 * after relocating the monitor code.
165 *
166 */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]167.globl relocate_code
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]168relocate_code:
169 link.w %a6,#0
170 move.l 8(%a6), %sp /* set new stack pointer */
171 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
172 move.l 16(%a6), %a0 /* Save copy of Destination Address */
173
174 move.l #CONFIG_SYS_MONITOR_BASE, %a1
175 move.l #__init_end, %a2
176 move.l %a0, %a3
177 /* copy the code to RAM */
1781:
179 move.l (%a1)+, (%a3)+
180 cmp.l %a1,%a2
181 bgt.s 1b
182
Marek Vasut549651f2023-08-27 00:25:36 +0200[diff] [blame]183#define R_68K_32 1
184#define R_68K_RELATIVE 22
185
186 move.l #(__rel_dyn_start), %a1
187 move.l #(__rel_dyn_end), %a2
188
189fixloop:
190 move.l (%a1)+, %d1 /* Elf32_Rela r_offset */
191 move.l (%a1)+, %d2 /* Elf32_Rela r_info */
192 move.l (%a1)+, %d3 /* Elf32_Rela r_addend */
193
194 andi.l #0xff, %d2
195 cmp.l #R_68K_32, %d2
196 beq.s fixup
197 cmp.l #R_68K_RELATIVE, %d2
198 beq.s fixup
199
200 bra fixnext
201
202fixup:
203 /* relative fix: store addend plus offset at dest location */
204 move.l %a0, %a3
205 add.l %d1, %a3
206 sub.l #CONFIG_SYS_MONITOR_BASE, %a3
207 move.l (%a3), %d4
208 add.l %a0, %d4
209 sub.l #CONFIG_SYS_MONITOR_BASE, %d4
210 move.l %d4, (%a3)
211
212fixnext:
213 cmp.l %a1, %a2
214 bge.s fixloop
215
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]216/*
217 * We are done. Do not return, instead branch to second part of board
218 * initialization, now running from RAM.
219 */
220 move.l %a0, %a1
221 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
222 jmp (%a1)
223
224in_ram:
225
226clear_bss:
227 /*
228 * Now clear BSS segment
229 */
Marek Vasut549651f2023-08-27 00:25:36 +0200[diff] [blame]230 move.l #(_sbss), %a1
231 move.l #(_ebss), %d1
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]2326:
233 clr.l (%a1)+
234 cmp.l %a1,%d1
235 bgt.s 6b
236
237 /*
238 * fix got table in RAM
239 */
Marek Vasut549651f2023-08-27 00:25:36 +0200[diff] [blame]240 move.l #(__got_start), %a5 /* fix got pointer register a5 */
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]241
242 /* calculate relative jump to board_init_r in ram */
Marek Vasut549651f2023-08-27 00:25:36 +0200[diff] [blame]243 move.l #(board_init_r), %a1
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]244
245 /* set parameters for board_init_r */
246 move.l %a0,-(%sp) /* dest_addr */
247 move.l %d0,-(%sp) /* gd */
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]248 jsr (%a1)
249
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]250/******************************************************************************/
251
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]252/* exception code */
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]253.globl _fault
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]254_fault:
255 bra _fault
256
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]257.globl _exc_handler
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]258_exc_handler:
259 SAVE_ALL
260 movel %sp,%sp@-
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]261 move.l #exc_handler, %a1
262 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]263 addql #4,%sp
264 RESTORE_ALL
265
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]266.globl _int_handler
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]267_int_handler:
268 SAVE_ALL
269 movel %sp,%sp@-
Angelo Dureghelloc5b17ce2023-02-24 01:43:19 +0100[diff] [blame]270 move.l #int_handler, %a1
271 jsr (%a1)
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]272 addql #4,%sp
273 RESTORE_ALL
274
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]275/******************************************************************************/
angelo@sysam.itbb4ba2c2015-02-12 01:40:00 +0100[diff] [blame]276
Angelo Dureghello65d59912016-05-22 00:14:29 +0200[diff] [blame]277.align 4