blob: 70043b9eeed4d4559ce56765cbcc3b167544f72a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chou7b059dc2015-10-30 15:35:52 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chou7b059dc2015-10-30 15:35:52 +08004 */
5
6#include <common.h>
7#include <dm.h>
8#include <timer.h>
9#include <dm/test.h>
Sean Anderson79d3bba2020-09-28 10:52:23 -040010#include <dm/device-internal.h>
Simon Glass75c4d412020-07-19 10:15:37 -060011#include <test/test.h>
Thomas Chou7b059dc2015-10-30 15:35:52 +080012#include <test/ut.h>
Sean Anderson79d3bba2020-09-28 10:52:23 -040013#include <asm/cpu.h>
Thomas Chou7b059dc2015-10-30 15:35:52 +080014
Thomas Chou7b059dc2015-10-30 15:35:52 +080015/*
16 * Basic test of the timer uclass.
17 */
18static int dm_test_timer_base(struct unit_test_state *uts)
19{
20 struct udevice *dev;
21
Sean Anderson79d3bba2020-09-28 10:52:23 -040022 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@0", &dev));
Thomas Chou7b059dc2015-10-30 15:35:52 +080023 ut_asserteq(1000000, timer_get_rate(dev));
24
25 return 0;
26}
Simon Glass974dccd2020-07-28 19:41:12 -060027DM_TEST(dm_test_timer_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Sean Anderson79d3bba2020-09-28 10:52:23 -040028
29/*
30 * Test of timebase fallback
31 */
32static int dm_test_timer_timebase_fallback(struct unit_test_state *uts)
33{
34 struct udevice *dev;
35
36 cpu_sandbox_set_current("cpu-test1");
37 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
38 ut_asserteq(3000000, timer_get_rate(dev));
39 ut_assertok(device_remove(dev, DM_REMOVE_NORMAL));
40
41 cpu_sandbox_set_current("cpu-test2");
42 ut_assertok(uclass_get_device_by_name(UCLASS_TIMER, "timer@1", &dev));
43 ut_asserteq(2000000, timer_get_rate(dev));
44
45 cpu_sandbox_set_current("cpu-test1");
46
47 return 0;
48}
49DM_TEST(dm_test_timer_timebase_fallback,
50 UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);