blob: 10bcd3a18737e190e93b1e5616d7ca49e1f65662 [file] [log] [blame]
Svyatoslav Ryhelde66d062023-10-24 10:49:03 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
4 */
5
6#include <dm.h>
7#include <errno.h>
8#include <sysreset.h>
9#include <linux/err.h>
10#include <asm/arch-tegra/pmc.h>
11
12static int tegra_sysreset_request(struct udevice *dev,
13 enum sysreset_t type)
14{
15 u32 value;
16
17 switch (type) {
18 case SYSRESET_WARM:
19 case SYSRESET_COLD:
20 /* resets everything but scratch 0 and reset status */
21 value = tegra_pmc_readl(PMC_CNTRL);
22 value |= PMC_CNTRL_MAIN_RST;
23 tegra_pmc_writel(value, PMC_CNTRL);
24 break;
25 default:
26 return -EPROTONOSUPPORT;
27 }
28
29 return -EINPROGRESS;
30}
31
32static struct sysreset_ops tegra_sysreset = {
33 .request = tegra_sysreset_request,
34};
35
36U_BOOT_DRIVER(sysreset_tegra) = {
37 .id = UCLASS_SYSRESET,
38 .name = "sysreset_tegra",
39 .ops = &tegra_sysreset,
40};
41
42/* Link to Tegra PMC once there is a driver */
43U_BOOT_DRVINFO(sysreset_tegra) = {
44 .name = "sysreset_tegra"
45};